Intel Acceleration Stack Quick Start Guide: Intel FPGA Programmable Acceleration Card D5005

ID 683394
Date 7/09/2021
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6.1. Loading an AFU Image into the FPGA

You can utilize the fpgasupdate utility to load an AFU image. In Acceleration Stack 2.0.1 and later versions, the Intel® FPGA PAC must be programmed with AFU images that have been prepended with mandatory headers. These headers are applied by the PACSign tool. For more information on the PACSign tool, please refer to the Security User Guide: Intel FPGA Programmable Acceleration Card D5005.

The samples included with Acceleration Stack have been processed by PACSign and the AFU binary files are located at:
$OPAE_PLATFORM_ROOT/hw/samples/<AFU Name>/bin/*_unsigned.gbs

If the Intel® FPGA PAC is programmed with a root entry hash following the steps in the Security User Guide: Intel FPGA Programmable Acceleration Card D5005, then the provided AFU bitstreams (for example: hello_afu_unsigned.gbs) must be signed using PACSign with the appropriate root and code signing keys before you can successfully program the signed AFU bitstream.

sudo fpgasupdate <AFU image>

The fpgasupdate tool can program an unsigned AFU bitstream provided that there is no root entry hash programmed into the flash.

The fpgasupdate tool also accepts PCIe* Bus:Device:Function (BDF) as an additional optional argument if multiple cards are connected to the server. Use the help text (-h) to see how additional arguments must be passed. For example: sudo fpgasupdate -h.

To identify the BDF run the following command:

 lspci | grep 0b2b

Sample output:

37:00.0 Processing accelerators: Intel Corporation Device 0b2b (rev 01)

In the Sample Output, the PCIe Bus is 0x37, the Device is 0x00, and the Function is 0x0.