AN 826: Hierarchical Partial Reconfiguration Tutorial: for Intel® Stratix® 10 GX FPGA Development Board

ID 683327
Date 1/05/2021

Reference Design Walkthrough

The following steps describe the application of partial reconfiguration to a flat design. The tutorial uses the Intel® Quartus® Prime Pro Edition software for the Intel® Stratix® 10 GX FPGA development board:
Note: Unlike AN 806: Hierarchical Partial Reconfiguration a Design Tutorial for Intel® Arria® 10 GX FPGA Development Board, this tutorial does not require the addition of a Partial Reconfiguration Controller IP core. This difference is because Intel® Stratix® 10 supports PR over JTAG using the hard JTAG pins of the FPGA.