HDMI Intel® Cyclone® 10 GX FGPA IP Design Example User Guide

ID 683309
Date 1/26/2024

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1.3. Generating the Design

Use the HDMI Intel® FPGA IP parameter editor in the Intel® Quartus® Prime Pro Edition software to generate the design examples.
Figure 3. Generating the Design Flow
  1. Create a project targeting Intel® Cyclone® 10 GX device family and select the desired device.
  2. In the IP Catalog, locate and double-click HDMI Intel® FPGA IP . The New IP Variant or New IP Variation window appears.
  3. Specify a top-level name for your custom IP variation. The parameter editor saves the IP variation settings in a file named <your_ip>.ip.
  4. Click OK. The parameter editor appears.
  5. On the IP tab, configure the desired parameters for both TX and RX.
  6. On the Design Example tab, select Cyclone 10 HDMI RX-TX Retransmit.
  7. Select Simulation to generate the testbench, and select Synthesis to generate the hardware design example.
    You must select at least one of these options to generate the design example files. If you select both, the generation time is longer.
  8. For Generate File Format, select Verilog or VHDL.
  9. For Target Development Kit, select Intel® Cyclone® 10 GX FPGA Development Kit. If you select a development kit, then the target device (selected in step 4) changes to match the device on target board. For Intel® Cyclone® 10 GX FPGA Development Kit, the default device is 10CX220YF780E5G.
  10. Click Generate Example Design.