AN 370: Using the Intel FPGA Serial Flash Loader with the Intel Quartus Prime Software

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ID 683299
Date 2/18/2019
Public
Document Table of Contents
Document Table of Contents x
1. Using the Intel® FPGA Serial Flash Loader IP Core with the Intel® Quartus® Prime Software
1. Using the Intel® FPGA Serial Flash Loader IP Core with the Intel® Quartus® Prime Software x
1.1. Features 1.2. Overview 1.3. Programming Single and Multiple Serial Configuration Devices with the Intel® FPGA Serial Flash Loader IP Core 1.4. Using the Intel® FPGA Serial Flash Loader IP Core in the Intel® Quartus® Prime Software 1.5. Generating .jic and .jam Programming Files in the Intel® Quartus® Prime Software 1.6. Programming Serial Configuration Devices with the Intel® Quartus® Prime Programmer 1.7. Features for Intel® Arria® 10 and Intel® Cyclone® 10 GX Devices 1.8. Intel® FPGA Serial Flash Loader IP Core Parameter 1.9. Intel® FPGA Serial Flash Loader IP Core Signals 1.10. Document Revision History for AN 370: Using the Intel® FPGA Serial Flash Loader IP Core with the Intel® Quartus® Prime Software
1.4. Using the Intel® FPGA Serial Flash Loader IP Core in the Intel® Quartus® Prime Software x
1.4.1. Instantiating the Intel® FPGA Serial Flash Loader IP Core
1.5. Generating .jic and .jam Programming Files in the Intel® Quartus® Prime Software x
1.5.1. Converting .sof to .jic Files in the Intel® Quartus® Prime Software 1.5.2. Converting .jic Files to .jam Files in the Intel® Quartus® Prime Software
1.6. Programming Serial Configuration Devices with the Intel® Quartus® Prime Programmer x
1.6.1. Programming Serial Configuration Devices Using the Intel® Quartus® Prime Programmer and .jic Files 1.6.2. Programming Serial Configuration Devices Using the Intel® Quartus® Prime Programmer and .jam Files
1.7. Features for Intel® Arria® 10 and Intel® Cyclone® 10 GX Devices x
1.7.1. Multiple Configuration Devices Support 1.7.2. Boot Page Selection
1. Using the Intel® FPGA Serial Flash Loader IP Core with the Intel® Quartus® Prime Software

1. Using the Intel® FPGA Serial Flash Loader IP Core with the Intel® Quartus® Prime Software

The Intel® FPGA Serial Flash Loader IP core is an in-system programming (ISP) solution for Intel® FPGA serial configuration devices. In-system programming offers you the option to program your serial configuration devices using a JTAG interface.

To use the JTAG interface to program your serial configuration device, you must create an instance of the Intel® FPGA Serial Flash Loader IP core into your FPGA to form a bridge between the FPGA JTAG hard logic and the FPGA active serial memory interface (ASMI) hard logic. You can then use a download cable ( Intel® FPGA Parallel Port Cable, Intel® FPGA Download Cable), production tester, and other tools that support JTAG to program your serial configuration device.


Section Content
Features
Overview
Programming Single and Multiple Serial Configuration Devices with the Intel FPGA Serial Flash Loader IP Core
Using the Intel FPGA Serial Flash Loader IP Core in the Intel Quartus Prime Software
Generating .jic and .jam Programming Files in the Intel Quartus Prime Software
Programming Serial Configuration Devices with the Intel Quartus Prime Programmer
Features for Intel Arria 10 and Intel Cyclone 10 GX Devices
Intel FPGA Serial Flash Loader IP Core Parameter
Intel FPGA Serial Flash Loader IP Core Signals
Document Revision History for AN 370: Using the Intel FPGA Serial Flash Loader IP Core with the Intel Quartus Prime Software

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