AN 370: Using the Intel FPGA Serial Flash Loader with the Intel Quartus Prime Software

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ID 683299
Date 2/18/2019
Public
Document Table of Contents
Document Table of Contents x
1. Using the Intel® FPGA Serial Flash Loader IP Core with the Intel® Quartus® Prime Software
1. Using the Intel® FPGA Serial Flash Loader IP Core with the Intel® Quartus® Prime Software x
1.1. Features 1.2. Overview 1.3. Programming Single and Multiple Serial Configuration Devices with the Intel® FPGA Serial Flash Loader IP Core 1.4. Using the Intel® FPGA Serial Flash Loader IP Core in the Intel® Quartus® Prime Software 1.5. Generating .jic and .jam Programming Files in the Intel® Quartus® Prime Software 1.6. Programming Serial Configuration Devices with the Intel® Quartus® Prime Programmer 1.7. Features for Intel® Arria® 10 and Intel® Cyclone® 10 GX Devices 1.8. Intel® FPGA Serial Flash Loader IP Core Parameter 1.9. Intel® FPGA Serial Flash Loader IP Core Signals 1.10. Document Revision History for AN 370: Using the Intel® FPGA Serial Flash Loader IP Core with the Intel® Quartus® Prime Software
1.4. Using the Intel® FPGA Serial Flash Loader IP Core in the Intel® Quartus® Prime Software x
1.4.1. Instantiating the Intel® FPGA Serial Flash Loader IP Core
1.5. Generating .jic and .jam Programming Files in the Intel® Quartus® Prime Software x
1.5.1. Converting .sof to .jic Files in the Intel® Quartus® Prime Software 1.5.2. Converting .jic Files to .jam Files in the Intel® Quartus® Prime Software
1.6. Programming Serial Configuration Devices with the Intel® Quartus® Prime Programmer x
1.6.1. Programming Serial Configuration Devices Using the Intel® Quartus® Prime Programmer and .jic Files 1.6.2. Programming Serial Configuration Devices Using the Intel® Quartus® Prime Programmer and .jam Files
1.7. Features for Intel® Arria® 10 and Intel® Cyclone® 10 GX Devices x
1.7.1. Multiple Configuration Devices Support 1.7.2. Boot Page Selection
1. Using the Intel® FPGA Serial Flash Loader IP Core with the Intel® Quartus® Prime Software

1.10. Document Revision History for AN 370: Using the Intel® FPGA Serial Flash Loader IP Core with the Intel® Quartus® Prime Software

Document Version Changes
2019.02.18 Added reference to the supported configuration devices in the Overview section.
Date Version Changes
December 2017 2017.12.18
  • Rebranded as Intel.
  • Renamed the document as Using the Intel FPGA Serial Flash Loader IP Core with the Intel Quartus Prime Software.
  • Added support for Intel Cyclone 10 GX device family.
  • Updated Table: In-System Programming Method Blocks.
  • Updated the Features for Intel Arria 10 and Intel Cyclone 10 GX Devices topic.
  • Updated the Multiple Configuration Devices Support topic.
  • Made minor text edits.
May 2016 2016.05.02
  • Added note to Programming Single and Multiple Serial Configuration Devices with the Altera Serial Flash Loader IP Core mentioning data width during configuration device programming.
July 2015 2015.07.01
  • Updated figures Programming Serial Configuration Devices with the Altera Serial Flash Loader IP Core Programming Flow by resizing it.
  • Removed redundant table description in Table 2: Altera Serial Flash Loader IP Core Parameter and Table 3: Altera Serial Flash Loader IP Core Signals.
  • Corrected typo's and defining .jic, .jam and .jbc files.
June 2015 2015.06.15
  • Updated megafunction to IP core.
  • Added information about setting program length count in to prevent early and late CONF_DONE assertion in 'Converting .sof to .jic Files in the Quartus II Software'.
  • Added Arria 10 device support in the IP core parameters and signals.
  • Added multiple flash and multiple stacked die flash support for Arria 10 devices.
August 2014 2014.08.18
  • Updated ncso_in port width.
  • Added EPCQL256, EPCQL512, and EPCQL1024.
July 2014 2014.07.04
  • IP core name changed from SFL megafunction to Altera Serial Flash Loader IP core to reflect the change in 14.0 release.
  • Listed IP core parameter settings.
  • Listed Arria V, Cyclone V, and Stratix V specific signals.
  • Updated figures to reflect the correct JTAG-ASMI bridge.
  • Included EPCQ devices information.
  • Updated content to reflect the IP Catalog changes.
  • Rewrite content to improve readability.
  • Updated template.
  • Removed outdated screen shots.
October 2012 3.2 Updated “Programming Single and Multiple Serial Configuration Devices with the SFL Solution” on page 3 to fix step error.

Updated “Programming Serial Configuration Devices Using the Quartus II Programmer and .jic Files” on page 17 to fix step error.

Updated template.

April 2009 3.1
  • Updated the “Introduction” section
  • Updated the “Using the SFL Megafunction in the Quartus II Software” section
  • Updated Figure 5 and Figure 7 in the “Instantiating SFL Megafunction in the Quartus II Software”
  • Updated Figure 8, Figure 9, Figure 10, and Figure 11 in the “Converting .sof to .jic Files in the Quartus II Software” section
  • Updated Figure 12 and Figure 13 in the “Converting .jic Files to .jam Files in the Quartus II Software” section
  • Updated Figure 14 and Figure 15 in the “Programming Serial Configuration Devices Using the Quartus II Programmer and .jic Files” section
  • Updated Figure 17 in the“Programming Serial Configuration Devices Using the Quartus II Programmer and .jam Files” section
  • Updated the “Instantiating SFL Megafunction in the Quartus II Software” section
  • Updated Figure 6 in “Instantiating SFL Megafunction in the Quartus II Software” section
  • Updated Table 2 in the “Instantiating SFL Megafunction in the Quartus II Software” section
  • Added handnote to the “Converting .sof to .jic Files in the Quartus II Software” section
  • Added handnote to the “Converting .jic Files to .jam Files in the Quartus II Software” section
  • Updated the “Programming Serial Configuration Devices with the Quartus II Programmer” section
  • Updated the “Programming Serial Configuration Devices Using the Quartus II Programmer and .jic Files” section
  • Updated the “Programming Single and Multiple Serial Configuration Devices with the SFL Solution” section
July 2006 3.0 Updated the first paragraph in the “Introduction” section

Updated the first column of Table 1

Updated the forth paragraph in the “Introduction” section

Updated the bulleted list in the “Introduction” section

Added Note to Step 2 of the “Steps for Programming Single and Multiple Serial Configuration Devices with the SFL Solution”section

Added Figure 2 to the“Steps for Programming Single and Multiple Serial Configuration Devices with the SFL Solution” section

Added notes to Figure 3 and Figure 4

Added the “Using the SFL Megafunction in the Quartus II Software” section

Added a note to Figure 11 and after Figure 11

June 2008 2.0 Updated the first and forth paragraph and the bulleted list in the “Introduction”section

Updated column one of Table 1

Updated steps 2 and 3 in the “Steps for Programming Single and Multiple Serial Configuration Devices with the SFL Solution” section

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