AN 712: Altera JESD204B MegaCore Function and ADI AD9625 Hardware Checkout Report

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ID 683294
Date 6/13/2016
Public

1.8. AN 712 Document Revision History

Date Version Changes
June 2016 2016.06.13
  • Added Arria 10 FPGA hardware setup and test results.
  • Updated the Deterministic Latency Measurement Ramp Test Pattern Diagram for Stratix V FPGA.
  • Split the test results section to Stratix V and Arria 10 GX FPGA.
October 2014 2014.10.13 Initial release.
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