Battery Management System Reference Design

ID 683279
Date 4/02/2016
Public
Document Table of Contents
Give Feedback

1.2.5. Compiling the FPGA Hardware Design for the BMS Reference Design

You can compile your design or use the Altera-provided pre-compiled .sof and .pof from the /master_image directory of your reference design
  1. Launch Quartus II software.
  2. Open project bms_soc_max10m50.qpf.
  3. Click Processing > Start Compilation.
    Note: You may edit the reference design project in Qsys.