DMA Accelerator Functional Unit User Guide: Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA

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ID 683263
Date 3/06/2020
Public
Document Table of Contents
Document Table of Contents x
1. About this Document 2. DMA AFU Description 3. Register Map and Address Spaces 4. Software Programming Model 5. Running DMA AFU Example 6. Compiling the Accelerator Function (AF) 7. Simulating the AFU Example 8. DMA Accelerator Functional Unit User Guide Archives 9. Document Revision History for the DMA Accelerator Functional Unit User Guide A. Enabling Hugepages
1. About this Document x
1.1. Intended Audience 1.2. Conventions 1.3. Acronyms 1.4. Acceleration Glossary
2. DMA AFU Description x
2.1. Introduction 2.2. The DMA AFU Software Package 2.3. The DMA AFU Hardware Components
2.3. The DMA AFU Hardware Components x
2.3.1. DMA Test System 2.3.2. DMA BBB
3. Register Map and Address Spaces x
3.1. DMA AFU Register Map
3.1. DMA AFU Register Map x
3.1.1. DMA AFU Address Space
4. Software Programming Model x
4.1. Software APIs
4.1. Software APIs x
4.1.1. fpgaDmaOpen() 4.1.2. fpgaDmaTransferSync() 4.1.3. fpgaDmaClose()
5. Running DMA AFU Example x
5.1. Optimization for Improved DMA Performance
1. About this Document
2. DMA AFU Description
3. Register Map and Address Spaces
4. Software Programming Model
5. Running DMA AFU Example
6. Compiling the Accelerator Function (AF)
7. Simulating the AFU Example
8. DMA Accelerator Functional Unit User Guide Archives
9. Document Revision History for the DMA Accelerator Functional Unit User Guide
A. Enabling Hugepages

6. Compiling the Accelerator Function (AF)

To generate a synthesis build environment to compile an AF, use the afu_synth_setup command as following:

  1. Change to the DMA AFU sample directory: 
    cd $OPAE_PLATFORM_ROOT/hw/samples/dma_afu
  2. Generate the design build directory: 
    afu_synth_setup --source=./hw/rtl/filelist.txt build_synth
  3. From the synthesis build directory generated by afu_synth_setup, enter the following commands from a terminal window to generate an AF for the target hardware platform: 
    cd build_synth

run.sh

    The run.sh AF generation script creates the AF image with the same base filename as the AFU’s platform configuration file with a .gbs suffix at the location: $OPAE_PLATFORM_ROOT/hw/samples/dma_afu/build_synth/dma_afu.gbs.

  4. Create an unsigned copy of the generated .gbs file: 
    PACSign PR -t UPDATE -H openssl_manager -i dma_afu.gbs -o dma_afu_unsigned.gbs
    Note: If your Intel® PAC already implements bitstream authentication, review the steps outlined in the Security User Guide: Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA to sign the DMA bitstream.
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