DMA Accelerator Functional Unit User Guide: Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA
ID
683263
Date
3/06/2020
Public
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Ixiasoft
1. About this Document
2. DMA AFU Description
3. Register Map and Address Spaces
4. Software Programming Model
5. Running DMA AFU Example
6. Compiling the Accelerator Function (AF)
7. Simulating the AFU Example
8. DMA Accelerator Functional Unit User Guide Archives
9. Document Revision History for the DMA Accelerator Functional Unit User Guide
A. Enabling Hugepages
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Ixiasoft
1. About this Document
Updated for: |
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Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs 1.2.1 |
This document describes the OpenCL* implementation for the Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA.