Intel® Quartus® Prime Pro Edition User Guide: Design Compilation

ID 683236
Date 6/21/2022
Public

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2.11.1. Verilog and SystemVerilog Synthesis Support

Intel® Quartus® Prime synthesis supports the following Verilog HDL language standards:
  • Verilog-1995 (IEEE Standard 1364-1995)
  • Verilog-2001 (IEEE Standard 1364-2001)
  • SystemVerilog-2005 (IEEE Standard 1800-2005)
  • SystemVerilog-2009 (IEEE Standard 1800-2009)
  • SystemVerilog-2012 (IEEE Standard 1800-2012)

The following important guidelines apply to Intel® Quartus® Prime synthesis of Verilog HDL and SystemVerilog:

  • The Compiler uses the Verilog-2001 standard by default for files with an extension of .v, and the SystemVerilog standard for files with the extension of .sv.
  • If you use scripts to add design files, you can use the -HDL_VERSION command to specify the HDL version for each design file.
  • Compiler support for Verilog HDL is case sensitive in accordance with the Verilog HDL standard.
  • The Compiler supports the compiler directive `define, in accordance with the Verilog HDL standard.
  • The Compiler supports the include compiler directive to include files with absolute paths (with either “/” or “\” as the separator), or relative paths.
  • When searching for a relative path, the Compiler initially searches relative to the project directory. If the Compiler cannot find the file, the Compiler next searches relative to all user libraries. Finally, the Compiler searches relative to the current file's directory location.
  • Intel® Quartus® Prime Pro Edition synthesis searches for all modules or entities earlier in the synthesis process than other Quartus software tools. This earlier search produces earlier syntax errors for undefined entities than other Quartus software tools.

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