Intel® Programmable Acceleration Card (PAC) with Intel® Arria® 10 GX FPGA Data Sheet

ID 683226
Date 10/26/2020
Document Table of Contents

8. PLDM Commands for the Board Management Controller

The BMC on the Intel® PAC with Intel® Arria® 10 GX FPGA can communicate with a server BMC over the PCIe I2C bus. The supported protocol is the PLDM over Management Component Transport Protocol (MCTP) stack.

The PAC BMC supports a subset of PLDM and MCTP commands, to enable a server BMC to obtain sensor data for fan control. The BMC supports version 1.1.1 of the PLDM for Platform Monitoring and Control standard (DTMF specification DSP0248). It does not support version 1.1.0.

For more information about the PLDM and MCTP protocol specifications, refer to DMTF Specifications on the Platform Management Components Intercommunication website.

Note: The PAC BMC does not break large MCTP packets down to 64-byte packets, as described in the MCTP specification for baseline transmission unit size. Otherwise the BMC is fully compliant to the DMTF specifications.