Intel® High Level Synthesis Compiler Pro Edition: Best Practices Guide

ID 683152
Date 4/01/2024
Public
Document Table of Contents

3.3.3.1.2.2. Pipelining Across Component Invocations

The pipelining of work across component invocations is similar to how loops are pipelined.

The Intel® HLS Compiler attempts to schedule the execution of component invocations such that the next invocation of a component enters the pipeline before the previous invocation has completed.