AN 808: Migration Guidelines from Intel® Arria® 10 to Intel® Stratix® 10 for 10G Ethernet Subsystem

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ID 683141
Date 11/20/2019
Public
Document Table of Contents
Document Table of Contents x
Migration Guidelines from Intel® Arria® 10 to Intel® Stratix® 10 for 10G Ethernet Subsystem
Migration Guidelines from Intel® Arria® 10 to Intel® Stratix® 10 for 10G Ethernet Subsystem x
Supported Configurations for Intel® Stratix® 10 and Intel® Arria® 10 LL 10GbE MAC Designs Clocking and Reset Infrastructure IP Register Mapping Signal Connectivity Differences between Intel® Stratix® 10 and Intel® Arria® 10 Ethernet Design Examples Migration Flow Document Revision History for AN 808: Migration Guidelines from Intel® Arria® 10 to Intel® Stratix® 10 for 10G Ethernet Subsystem
Clocking and Reset Infrastructure x
Intel® Stratix® 10 LL 10GbE MAC and Intel® Stratix® 10 Transceiver Native PHY IP Cores Intel® Stratix® 10 LL 10GbE MAC and Intel® Stratix® 10 1G/2.5G/5G/10G Multi-rate Ethernet PHY Intel® FPGA IP Cores
Migration Guidelines from Intel® Arria® 10 to Intel® Stratix® 10 for 10G Ethernet Subsystem

Supported Configurations for Intel® Stratix® 10 and Intel® Arria® 10 LL 10GbE MAC Designs

The following table lists all the possible Intel® Stratix® 10 and Intel® Arria® 10 Ethernet IP configurations.

Table 2.  Supported Configurations for Intel® Arria® 10 and Intel® Stratix® 10 Ethernet IP Configuration
IP Core Intel® Arria® 10 Intel® Stratix® 10
LL 10GbE MAC Speed
  • 10G
  • 1G/10G
  • 10M/100M/1G/10G
  • 1G/2.5G
  • 1G/2.5G/10G
  • 1G/2.5G/5G/10G (USXGMII interface)
  • 10M/100M/1G/2.5G
  • 10M/100M/1G/2.5G/10G
IEEE 1588v2 feature
  • 10G
  • 1G/10G
  • 10M/100M/1G/10G
  • 1G/2.5G
  • 10G
  • 1G/10G
  • 10M/100M/1G/10G
  • 1G/2.5G
  • 1G/2.5G/10G
1G/2.5G/5G/10G Multi-rate Ethernet PHY Speed
  • 2.5G
  • 1G/2.5G
  • 1G/2.5G/10G (MGBASE-T PHY)
  • 1G/2.5G/5G/10G (USXGMII interface/NBASE-T PHY)
IEEE 1588v2 feature
  • 2.5G
  • 1G/2.5G
  • 2.5G
  • 1G/2.5G
  • 1G/2.5G/10G

Not supported for enabled SGMII mode.
SGMII Mode Not available
  • 1G/2.5G
  • 1G/2.5G/10G
XAUI PHY Available Not available
Intel® Stratix® 10 L-tile/H-tile Transceiver Native PHY Not available Supported presets:
  • 10GBASE-R
  • 10GBASE-R 1588
  • 10GBASE-R Low Latency
  • 10GBASE-R with KR FEC
Intel® Arria® 10 Transceiver Native PHY Supported presets:
  • 10GBASE-R
  • 10GBASE-R Register Mode
  • 10GBASE-R Low Latency
  • 10GBASE-R with KR FEC
 Not available
Intel® Arria® 10 1G/10GbE and 10GBASE-KR PHY Available Not available
Intel® Stratix® 10 10GBASE-KR PHY Not available Available
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