4.1. Evaluation with Maxim Integrated* 's MAX31730 Temperature Sensing Chip Evaluation Board
This evaluation was conducted with setup steps as described in the Offset Compensation section.
The data was collected before and after applying the offset compensation. Different offset temperature was applied to different Altera® FPGA blocks because a single offset value cannot be applied on all blocks. The following figures show the results.
Figure 8. Data for Stratix® 10 Core Fabric
Figure 9. Data for Altera® FPGA H-Tile and L-Tile
Figure 10. Data for Altera® FPGA E-Tile
Figure 11. Data for Altera® FPGA P-Tile