Intel Agilex® 7 SEU Mitigation User Guide

ID 683128
Date 2/20/2024
Document Table of Contents

1. Intel Agilex® 7 SEU Mitigation Overview

Updated for:
Intel® Quartus® Prime Design Suite 23.3
Single event upsets (SEUs) are rare and unintended changes in the internal memory elements of an FPGA caused by cosmic radiation. The memory state change is a soft error with no permanent damage but the FPGA may operate erroneously until background scrubbing fixes the upset.

Because of the low chance of occurrence, your design may not require SEU mitigation. However, if your system includes multiple FPGAs and requires very high reliability and availability, consider using mitigation techniques to detect and recover from SEU errors.