Intel Agilex® 7 SEU Mitigation User Guide

ID 683128
Date 2/20/2024
Document Table of Contents

2.2. Error Message Queue

When it detects an SEU error, the Intel Agilex® 7 device stores the error information in the error message queue. Each error message records the sector address, type, and location of the error. The error message queue is capable of storing a maximum of eight different messages. A warning message appears if the error message queue has more than eight different messages. Click Read EMR to display and clear the error message queue.

The SEU_ERROR signal goes high whenever the error message queue contains one or more error messages. The signal stays high if there is an error message in the queue. The SEU_ERROR signal goes low only when the SEU error message queue is empty—after you read out all the error messages. You must set the SEU_ERROR pin function to observe the SEU_ERROR pin behavior.

To retrieve the error message queue contents, use these tools:

  • Intel® Quartus® Prime Fault Injection Debugger
  • Advanced SEU Detection Intel® FPGA IP
  • Mailbox command
You may send the mailbox command via JTAG interface using Configuration Debugger Tool to retrieve the SEU error message:
  1. From the Intel® Quartus® Prime menu, select Tools > Configuration Debugger.
  2. Select the hardware in Hardware Setup and click Load Device to select your device.
  3. Click View and select SDM Tool to enable the Mailbox Client window.
  4. Specify the Command Code and Parameter List.
  5. Click Send and read the response in Session Log.
Figure 2. Executing the read_seu_error Mailbox Command via JTAG Interface Using the Configuration Debugger ToolThe figure below shows a corrected error at sector 17 in frame 7D0 and bit F83.

The SDM firmware may not capture the SEU error if the SEU error occurs within the sectors used for partial reconfiguration, from one SEU interval before the partial reconfiguration until the partial reconfiguration completion.

Table 4.  SEU Error Message Bit Description
Name Width Bit Description

Sector address

(Most significant 32-bit word in avst_seu_source_data signal)

32 31:24 Reserved
23:16 Sector address of the error
15:8 Reserved
7:4 Error Type:
  • 0000—SEU error
  • 0001—SDM and Subsystem ECC Error
  • 0010—Misc CNT error1
  • 0011—SmartVID error
  • 0100—Misc SDM error
  • Remaining values—reserved
3:0 Reserved

Error location2

(Least significant 32-bit word in avst_seu_source_data signal)

32 31:29 Error type:
  • 001—single bit error
  • 010—double adjacent bit error
  • 011—uncorrectable multiple bits error
28 Correction Status:
  • 0—not corrected
  • 1—corrected
27:25 Reserved
24:12 Bit position within the frame
11:0 Combination of row and frame index
1 Contact Intel Customer Support for further assistance when you see this error.
2 For single bit error with internal scrubbing, the error location provides the error bit position. For multiple bit errors or single bit error without internal scrubbing, bit [24:0] returns 0.