Intel Agilex® 7 SEU Mitigation User Guide

ID 683128
Date 2/20/2024
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

2.4.1.2. On-Chip Lookup Sensitivity Processing

For the on-chip sensitivity processing, the Advanced SEU Detection IP reads the error message queue content and then compares single-bit error locations with a sensitivity map. This check determines whether or not the failure affects the device operation.
Figure 4. System Overview for On-Chip Lookup Sensitivity Processing with Advanced SEU Detection IP


Figure 5. Process Flow for On-Chip Lookup Sensitivity Processing