5G LDPC Intel® FPGA IP User Guide

ID 683107
Date 4/01/2024
Document Table of Contents

1. About the 5G LDPC Intel® FPGA IP

Updated for:
Intel® Quartus® Prime Design Suite 24.1
IP Version 21.1.5
Low-density parity-check (LDPC) codes are linear error correcting codes that help you to transmit and receive messages over noisy channels. The 5G LDPC Intel® FPGA IP implements LDPC codes compliant with the 3rd Generation Partnership Project (3GPP) 5G specification for integration in your wireless design.

LDPC codes replace Turbo codes, popular in 3G and 4G wireless cellular communications. LDPC codes offer better spectral efficiency and support the high throughput for 5G new radio (NR).