1.1. Altera IP Catalog and Parameter Editor
1.2. Installing and Licensing Altera* IP Cores
1.3. Best Practices for Altera* IP
1.4. IP General Settings
1.5. Specifying the IP Parameters and Options ( Quartus® Prime Pro Edition)
1.6. Generating IP Cores ( Quartus® Prime Standard Edition)
1.7. Generating Example Designs for Altera* IP
1.8. Modifying an IP Variation
1.9. Upgrading IP Cores
1.10. Simulating Altera* IP Cores
1.11. Synthesizing IP Cores in Other EDA Tools
1.12. Support for the IEEE 1735 Encryption Standard
1.13. Introduction to Altera* IP Cores Revision History
1.14. Introduction to Altera* IP Cores Archives
1.10.4.1.1. Sourcing Aldec ActiveHDL* or Riviera Pro* Simulator Setup Scripts
1.10.4.1.2. Sourcing Cadence Incisive* Simulator Setup Scripts
1.10.4.1.3. Sourcing Cadence Xcelium* Simulator Setup Scripts
1.10.4.1.4. Sourcing QuestaSim* Simulator Setup Scripts
1.10.4.1.5. Sourcing Synopsys VCS* (2-Step) Simulator Setup Scripts
1.10.4.1.6. Sourcing Synopsys VCS* (3-Step) Simulator Setup Scripts
1.8. Modifying an IP Variation
After generating an IP core variation, use any of the following methods to modify the IP variation in the parameter editor.
Menu Command | Action |
---|---|
File > Open | Select the top-level HDL (.v, or .vhd) IP variation file to launch the parameter editor and modify the IP variation. Regenerate the IP variation to implement your changes. |
View > Utility Windows > Project Navigator > IP Components | Double-click the IP variation to launch the parameter editor and modify the IP variation. Regenerate the IP variation to implement your changes. |
Project > Upgrade IP Components | Select the IP variation and click Upgrade in Editor to launch the parameter editor and modify the IP variation. Regenerate the IP variation to implement your changes. |