Ethernet Design Example Components User Guide

ID 683044
Date 11/21/2023
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1.5.2. Time-of-day Signals

Table 11.  Time-of-day Signals Description
Name Direction Width Description
time_of_day_96[] Out 96 96-bit time of day streamed by the TOD clock.
time_of_day_64[] Out 64 64-bit time of day streamed by the TOD clock.
time_of_day_96b_load_valid In 1 Assert this signal for one clock cycle to indicate that the time_of_day_96b_load_data[] bus is valid. It indicates that the 96-bit time of day is synchronized and loaded into the TOD clock.
time_of_day_64b_load_valid In 1 Assert this signal for one clock cycle to indicate that the time_of_day_64b_load_data[] bus is valid. It indicates that the 64-bit time of day is synchronized and loaded into the TOD clock.
time_of_day_96b_load_data[] In 96 96-bit time of day from the master TOD clock.
time_of_day_64b_load_data[] In 64 64-bit time of day from the master TOD clock.
period_clk In 1 Clock for the TOD clock. Ensure that this clock is in the same clock domain as the TX and RX clock signals of the MAC IP.
period_rst_n In 1 Active-low reset signal for the period_clk domain. Synchronous to period_clk.