Serial Digital Interface (SDI) II Intel® FPGA IP Release Notes

ID 683016
Date 7/08/2024
Public

1.10. SDI II Intel® FPGA IP v18.1

Table 10.  v18.1 September 2018
Description Impact

Enabled payload ID insertion into chroma streams and 6G-SDI with 8 streams interleaved for the IP core.

These changes are optional. If you do not upgrade your IP core, it does not have these new features.

Enhanced TRS detection in 6G-SDI and 12G-SDI for better performance for the IP core.

Fixed payload ID insertion issues on 1080p50/60 on 3G Level A and SD 525i video formats in the Arria® 10, Cyclone® 10 GX, and Stratix® 10 design examples.

Improved robustness in the serial loopback design during standard switching in the Arria® 10, Cyclone® 10 GX, and Stratix® 10 design examples.