Cyclone® V GX, GT, and E Device Errata

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ID 683015
Date 8/01/2023
Public
Document Table of Contents
Document Table of Contents x
1. Cyclone V GX, GT, and E Device Errata
1. Cyclone V GX, GT, and E Device Errata x
1.1. TLP Corruption in x2 Mode 1.2. JTAG Programming of 28-nm Devices 1.3. Signal Detect Issue in PCIe Configuration 1.4. External Memory Interface (EMIF) Maximum Frequency Specification Update 1.5. Fractional PLL Phase Alignment Error 1.6. Configuration via Protocol (CvP) 1.7. Usermode High Icc 1.8. False Configuration Failure in Active Serial Multi-Device Configuration x1 Mode 1.9. Revision History for Cyclone® V GX, GT, and E Device Errata
1. Cyclone V GX, GT, and E Device Errata

1.6. Configuration via Protocol (CvP)

Description

The fix for this issue requires a new die revision. Use the die revision character in the Date Code (printed on the top side of the device) to determine if the device supports CvP. The CvP update can only be used at Gen1 data rates.

CvP is supported if the fourth alphanumeric character from the left (“Z” in Figure below) is equal to, or later in the alphabet than the letter in the "Revision with Fix" column of the table shown in the "Status" section below.

Figure 2. Altera Date Code Marking FormatThis figure explains the date code and revision marking format.

Status

Affects: Cyclone® V GX and GT devices, except for 5CGXC3

Status: Devices that are CvP capable will be available in Q2 2013

The table below shows which revisions will have the fix.

Table 3.  Device and Die Revisions
Note: Future revisions beyond the one listed in the "Revision with Fix" column will be CvP capable.
Member Code Revisions without Fix Revision with Fix
5CGXC3 None A
5CGXC4 A B
5CGXC5 A B
5CGXC7 A and B C
5CGXC9 A B
5CGTD5 A B
5CGTD7 A and B C
5CGTD9 A B
Note: For Gen2 CvP updates or further inquiries, please contact Intel® Premier Support.
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