System Manager Module Address Map

Registers in the System Manager module

Base Address: 0xFFD08000

System Manager Module

Register Offset Width Access Reset Value Description
siliconid1 0x0 32 RO 0x1 Silicon ID1 Register
siliconid2 0x4 32 RO 0x0 Silicon ID2 Register
wddbg 0x10 32 RW 0xF L4 Watchdog Debug Register
bootinfo 0x14 32 RO 0x0 Boot Info Register
hpsinfo 0x18 32 RO 0x0 HPS Info Register
parityinj 0x1C 32 RW 0x0 Parity Fail Injection Register

FPGA Interface Group

Register Offset Width Access Reset Value Description
gbl 0x20 32 RW 0x1 Global Disable Register
indiv 0x24 32 RW 0xFF Individual Disable Register
module 0x28 32 RW 0x0 Module Disable Register

Scan Manager Group

Register Offset Width Access Reset Value Description
ctrl 0x30 32 RW 0x0 Scan Manager Control Register

Freeze Control Group

Register Offset Width Access Reset Value Description
vioctrl 0x40 32 RW 0x0 VIO Control Register
hioctrl 0x50 32 RW 0xE0 HIO Control Register
src 0x54 32 RW 0x0 Source Register
hwctrl 0x58 32 RW 0x5 Hardware Control Register

EMAC Group

Register Offset Width Access Reset Value Description
ctrl 0x60 32 RW 0xA Control Register
l3master 0x64 32 RW 0x0 EMAC L3 Master AxCACHE Register

DMA Controller Group

Register Offset Width Access Reset Value Description
ctrl 0x70 32 RW 0x0 Control Register
persecurity 0x74 32 RW 0x0 Peripheral Security Register

Preloader (initial software) Group

Register Offset Width Access Reset Value Description
handoff 0x80 32 RW 0x0 Preloader to OS Handoff Information

Boot ROM Code Register Group

Register Offset Width Access Reset Value Description
ctrl 0xC0 32 RW 0x0 Control Register
cpu1startaddr 0xC4 32 RW 0x0 CPU1 Start Address Register
initswstate 0xC8 32 RW 0x0 Preloader (initial software) State Register
initswlastld 0xCC 32 RW 0x0 Preloader (initial software) Last Image Loaded Register
bootromswstate 0xD0 32 RW 0x0 Boot ROM Software State Register

Warm Boot from On-Chip RAM Group

Register Offset Width Access Reset Value Description
enable 0xE0 32 RW 0x0 Enable Register
datastart 0xE4 32 RW 0x0 Data Start Register
length 0xE8 32 RW 0x0 Length Register
execution 0xEC 32 RW 0x0 Execution Register
crc 0xF0 32 RW 0xE763552A Expected CRC Register

Boot ROM Hardware Register Group

Register Offset Width Access Reset Value Description
ctrl 0x100 32 RW 0x2 Boot ROM Hardware Control Register

SDMMC Controller Group

Register Offset Width Access Reset Value Description
ctrl 0x108 32 RW 0x0 Control Register
l3master 0x10C 32 RW 0x3 SD/MMC L3 Master HPROT Register

NAND Flash Controller Register Group

Register Offset Width Access Reset Value Description
bootstrap 0x110 32 RW 0x0 Bootstrap Control Register
l3master 0x114 32 RW 0x0 NAND L3 Master AxCACHE Register

USB Controller Group

Register Offset Width Access Reset Value Description
l3master 0x118 32 RW 0xF USB L3 Master HPROT Register

ECC Management Register Group

Register Offset Width Access Reset Value Description
l2 0x140 32 RW 0x0 L2 Data RAM ECC Enable Register
ocram 0x144 32 RW 0x0 On-chip RAM ECC Enable Register
usb0 0x148 32 RW 0x0 USB0 RAM ECC Enable Register
usb1 0x14C 32 RW 0x0 USB1 RAM ECC Enable Register
emac0 0x150 32 RW 0x0 EMAC0 RAM ECC Enable Register
emac1 0x154 32 RW 0x0 EMAC1 RAM ECC Enable Register
dma 0x158 32 RW 0x0 DMA RAM ECC Enable Register
can0 0x15C 32 RW 0x0 CAN0 RAM ECC Enable Register
can1 0x160 32 RW 0x0 CAN1 RAM ECC Enable Register
nand 0x164 32 RW 0x0 NAND RAM ECC Enable Register
qspi 0x168 32 RW 0x0 QSPI RAM ECC Enable Register
sdmmc 0x16C 32 RW 0x0 SDMMC RAM ECC Enable Register

Pin Mux Control Group

Register Offset Width Access Reset Value Description
EMACIO0 0x400 32 RW 0x0 emac0_tx_clk Mux Selection Register
EMACIO1 0x404 32 RW 0x0 emac0_tx_d0 Mux Selection Register
EMACIO2 0x408 32 RW 0x0 emac0_tx_d1 Mux Selection Register
EMACIO3 0x40C 32 RW 0x0 emac0_tx_d2 Mux Selection Register
EMACIO4 0x410 32 RW 0x0 emac0_tx_d3 Mux Selection Register
EMACIO5 0x414 32 RW 0x0 emac0_rx_d0 Mux Selection Register
EMACIO6 0x418 32 RW 0x0 emac0_mdio Mux Selection Register
EMACIO7 0x41C 32 RW 0x0 emac0_mdc Mux Selection Register
EMACIO8 0x420 32 RW 0x0 emac0_rx_ctl Mux Selection Register
EMACIO9 0x424 32 RW 0x0 emac0_tx_ctl Mux Selection Register
EMACIO10 0x428 32 RW 0x0 emac0_rx_clk Mux Selection Register
EMACIO11 0x42C 32 RW 0x0 emac0_rx_d1 Mux Selection Register
EMACIO12 0x430 32 RW 0x0 emac0_rx_d2 Mux Selection Register
EMACIO13 0x434 32 RW 0x0 emac0_rx_d3 Mux Selection Register
FLASHIO0 0x450 32 RW 0x0 sdmmc_cmd Mux Selection Register
FLASHIO1 0x454 32 RW 0x0 sdmmc_pwren Mux Selection Register
FLASHIO2 0x458 32 RW 0x0 sdmmc_d0 Mux Selection Register
FLASHIO3 0x45C 32 RW 0x0 sdmmc_d1 Mux Selection Register
FLASHIO4 0x460 32 RW 0x0 sdmmc_d4 Mux Selection Register
FLASHIO5 0x464 32 RW 0x0 sdmmc_d5 Mux Selection Register
FLASHIO6 0x468 32 RW 0x0 sdmmc_d6 Mux Selection Register
FLASHIO7 0x46C 32 RW 0x0 sdmmc_d7 Mux Selection Register
FLASHIO8 0x470 32 RW 0x0 sdmmc_clk_in Mux Selection Register
FLASHIO9 0x474 32 RW 0x0 sdmmc_clk Mux Selection Register
FLASHIO10 0x478 32 RW 0x0 sdmmc_d2 Mux Selection Register
FLASHIO11 0x47C 32 RW 0x0 sdmmc_d3 Mux Selection Register
GENERALIO0 0x480 32 RW 0x0 trace_clk Mux Selection Register
GENERALIO1 0x484 32 RW 0x0 trace_d0 Mux Selection Register
GENERALIO2 0x488 32 RW 0x0 trace_d1 Mux Selection Register
GENERALIO3 0x48C 32 RW 0x0 trace_d2 Mux Selection Register
GENERALIO4 0x490 32 RW 0x0 trace_d3 Mux Selection Register
GENERALIO5 0x494 32 RW 0x0 trace_d4 Mux Selection Register
GENERALIO6 0x498 32 RW 0x0 trace_d5 Mux Selection Register
GENERALIO7 0x49C 32 RW 0x0 trace_d6 Mux Selection Register
GENERALIO8 0x4A0 32 RW 0x0 trace_d7 Mux Selection Register
GENERALIO9 0x4A4 32 RW 0x0 spim0_clk Mux Selection Register
GENERALIO10 0x4A8 32 RW 0x0 spim0_mosi Mux Selection Register
GENERALIO11 0x4AC 32 RW 0x0 spim0_miso Mux Selection Register
GENERALIO12 0x4B0 32 RW 0x0 spim0_ss0 Mux Selection Register
GENERALIO13 0x4B4 32 RW 0x0 uart0_rx Mux Selection Register
GENERALIO14 0x4B8 32 RW 0x0 uart0_tx Mux Selection Register
GENERALIO15 0x4BC 32 RW 0x0 i2c0_sda Mux Selection Register
GENERALIO16 0x4C0 32 RW 0x0 i2c0_scl Mux Selection Register
GENERALIO17 0x4C4 32 RW 0x0 can0_rx Mux Selection Register
GENERALIO18 0x4C8 32 RW 0x0 can0_tx Mux Selection Register
MIXED1IO0 0x500 32 RW 0x0 nand_ale Mux Selection Register
MIXED1IO1 0x504 32 RW 0x0 nand_ce Mux Selection Register
MIXED1IO2 0x508 32 RW 0x0 nand_cle Mux Selection Register
MIXED1IO3 0x50C 32 RW 0x0 nand_re Mux Selection Register
MIXED1IO4 0x510 32 RW 0x0 nand_rb Mux Selection Register
MIXED1IO5 0x514 32 RW 0x0 nand_dq0 Mux Selection Register
MIXED1IO6 0x518 32 RW 0x0 nand_dq1 Mux Selection Register
MIXED1IO7 0x51C 32 RW 0x0 nand_dq2 Mux Selection Register
MIXED1IO8 0x520 32 RW 0x0 nand_dq3 Mux Selection Register
MIXED1IO9 0x524 32 RW 0x0 nand_dq4 Mux Selection Register
MIXED1IO10 0x528 32 RW 0x0 nand_dq5 Mux Selection Register
MIXED1IO11 0x52C 32 RW 0x0 nand_dq6 Mux Selection Register
MIXED1IO12 0x530 32 RW 0x0 nand_dq7 Mux Selection Register
MIXED1IO13 0x534 32 RW 0x0 nand_wp Mux Selection Register
MIXED1IO14 0x538 32 RW 0x0 nand_we Mux Selection Register
MIXED1IO15 0x53C 32 RW 0x0 qspi_io0 Mux Selection Register
MIXED1IO16 0x540 32 RW 0x0 qspi_io1 Mux Selection Register
MIXED1IO17 0x544 32 RW 0x0 qspi_io2 Mux Selection Register
MIXED1IO18 0x548 32 RW 0x0 qspi_io3 Mux Selection Register
MIXED1IO19 0x54C 32 RW 0x0 qspi_ss0 Mux Selection Register
MIXED1IO20 0x550 32 RW 0x0 qpsi_clk Mux Selection Register
MIXED1IO21 0x554 32 RW 0x0 qspi_ss1 Mux Selection Register
GPLINMUX48 0x578 32 RW 0x0 GPIO/LoanIO 48 Input Mux Selection Register
GPLINMUX49 0x57C 32 RW 0x0 GPIO/LoanIO 49 Input Mux Selection Register
GPLINMUX50 0x580 32 RW 0x0 GPIO/LoanIO 50 Input Mux Selection Register
GPLINMUX51 0x584 32 RW 0x0 GPIO/LoanIO 51 Input Mux Selection Register
GPLINMUX52 0x588 32 RW 0x0 GPIO/LoanIO 52 Input Mux Selection Register
GPLINMUX53 0x58C 32 RW 0x0 GPIO/LoanIO 53 Input Mux Selection Register
GPLINMUX54 0x590 32 RW 0x0 GPIO/LoanIO 54 Input Mux Selection Register
GPLINMUX55 0x594 32 RW 0x0 GPIO/LoanIO 55 Input Mux Selection Register
GPLINMUX56 0x598 32 RW 0x0 GPIO/LoanIO 56 Input Mux Selection Register
GPLINMUX57 0x59C 32 RW 0x0 GPIO/LoanIO 57 Input Mux Selection Register
GPLINMUX58 0x5A0 32 RW 0x0 GPIO/LoanIO 58 Input Mux Selection Register
GPLINMUX59 0x5A4 32 RW 0x0 GPIO/LoanIO 59 Input Mux Selection Register
GPLINMUX60 0x5A8 32 RW 0x0 GPIO/LoanIO 60 Input Mux Selection Register
GPLINMUX61 0x5AC 32 RW 0x0 GPIO/LoanIO 61 Input Mux Selection Register
GPLINMUX62 0x5B0 32 RW 0x0 GPIO/LoanIO 62 Input Mux Selection Register
GPLINMUX63 0x5B4 32 RW 0x0 GPIO/LoanIO 63 Input Mux Selection Register
GPLINMUX64 0x5B8 32 RW 0x0 GPIO/LoanIO 64 Input Mux Selection Register
GPLINMUX65 0x5BC 32 RW 0x0 GPIO/LoanIO 65 Input Mux Selection Register
GPLINMUX66 0x5C0 32 RW 0x0 GPIO/LoanIO 66 Input Mux Selection Register
GPLINMUX67 0x5C4 32 RW 0x0 GPIO/LoanIO 67 Input Mux Selection Register
GPLINMUX68 0x5C8 32 RW 0x0 GPIO/LoanIO 68 Input Mux Selection Register
GPLINMUX69 0x5CC 32 RW 0x0 GPIO/LoanIO 69 Input Mux Selection Register
GPLINMUX70 0x5D0 32 RW 0x0 GPIO/LoanIO 70 Input Mux Selection Register
GPLMUX0 0x5D4 32 RW 0x0 GPIO/LoanIO 0 Output/Output Enable Mux Selection Register
GPLMUX1 0x5D8 32 RW 0x0 GPIO/LoanIO 1 Output/Output Enable Mux Selection Register
GPLMUX2 0x5DC 32 RW 0x0 GPIO/LoanIO 2 Output/Output Enable Mux Selection Register
GPLMUX3 0x5E0 32 RW 0x0 GPIO/LoanIO 3 Output/Output Enable Mux Selection Register
GPLMUX4 0x5E4 32 RW 0x0 GPIO/LoanIO 4 Output/Output Enable Mux Selection Register
GPLMUX5 0x5E8 32 RW 0x0 GPIO/LoanIO 5 Output/Output Enable Mux Selection Register
GPLMUX6 0x5EC 32 RW 0x0 GPIO/LoanIO 6 Output/Output Enable Mux Selection Register
GPLMUX7 0x5F0 32 RW 0x0 GPIO/LoanIO 7 Output/Output Enable Mux Selection Register
GPLMUX8 0x5F4 32 RW 0x0 GPIO/LoanIO 8 Output/Output Enable Mux Selection Register
GPLMUX9 0x5F8 32 RW 0x0 GPIO/LoanIO 9 Output/Output Enable Mux Selection Register
GPLMUX10 0x5FC 32 RW 0x0 GPIO/LoanIO 10 Output/Output Enable Mux Selection Register
GPLMUX11 0x600 32 RW 0x0 GPIO/LoanIO 11 Output/Output Enable Mux Selection Register
GPLMUX12 0x604 32 RW 0x0 GPIO/LoanIO 12 Output/Output Enable Mux Selection Register
GPLMUX13 0x608 32 RW 0x0 GPIO/LoanIO 13 Output/Output Enable Mux Selection Register
GPLMUX14 0x60C 32 RW 0x0 GPIO/LoanIO 14 Output/Output Enable Mux Selection Register
GPLMUX15 0x610 32 RW 0x0 GPIO/LoanIO 15 Output/Output Enable Mux Selection Register
GPLMUX16 0x614 32 RW 0x0 GPIO/LoanIO 16 Output/Output Enable Mux Selection Register
GPLMUX17 0x618 32 RW 0x0 GPIO/LoanIO 17 Output/Output Enable Mux Selection Register
GPLMUX18 0x61C 32 RW 0x0 GPIO/LoanIO 18 Output/Output Enable Mux Selection Register
GPLMUX19 0x620 32 RW 0x0 GPIO/LoanIO 19 Output/Output Enable Mux Selection Register
GPLMUX20 0x624 32 RW 0x0 GPIO/LoanIO 20 Output/Output Enable Mux Selection Register
GPLMUX21 0x628 32 RW 0x0 GPIO/LoanIO 21 Output/Output Enable Mux Selection Register
GPLMUX22 0x62C 32 RW 0x0 GPIO/LoanIO 22 Output/Output Enable Mux Selection Register
GPLMUX23 0x630 32 RW 0x0 GPIO/LoanIO 23 Output/Output Enable Mux Selection Register
GPLMUX24 0x634 32 RW 0x0 GPIO/LoanIO 24 Output/Output Enable Mux Selection Register
GPLMUX25 0x638 32 RW 0x0 GPIO/LoanIO 25 Output/Output Enable Mux Selection Register
GPLMUX26 0x63C 32 RW 0x0 GPIO/LoanIO 26 Output/Output Enable Mux Selection Register
GPLMUX27 0x640 32 RW 0x0 GPIO/LoanIO 27 Output/Output Enable Mux Selection Register
GPLMUX28 0x644 32 RW 0x0 GPIO/LoanIO 28 Output/Output Enable Mux Selection Register
GPLMUX29 0x648 32 RW 0x0 GPIO/LoanIO 29 Output/Output Enable Mux Selection Register
GPLMUX30 0x64C 32 RW 0x0 GPIO/LoanIO 30 Output/Output Enable Mux Selection Register
GPLMUX31 0x650 32 RW 0x0 GPIO/LoanIO 31 Output/Output Enable Mux Selection Register
GPLMUX32 0x654 32 RW 0x0 GPIO/LoanIO 32 Output/Output Enable Mux Selection Register
GPLMUX33 0x658 32 RW 0x0 GPIO/LoanIO 33 Output/Output Enable Mux Selection Register
GPLMUX34 0x65C 32 RW 0x0 GPIO/LoanIO 34 Output/Output Enable Mux Selection Register
GPLMUX35 0x660 32 RW 0x0 GPIO/LoanIO 35 Output/Output Enable Mux Selection Register
GPLMUX36 0x664 32 RW 0x0 GPIO/LoanIO 36 Output/Output Enable Mux Selection Register
GPLMUX37 0x668 32 RW 0x0 GPIO/LoanIO 37 Output/Output Enable Mux Selection Register
GPLMUX38 0x66C 32 RW 0x0 GPIO/LoanIO 38 Output/Output Enable Mux Selection Register
GPLMUX39 0x670 32 RW 0x0 GPIO/LoanIO 39 Output/Output Enable Mux Selection Register
GPLMUX40 0x674 32 RW 0x0 GPIO/LoanIO 40 Output/Output Enable Mux Selection Register
GPLMUX41 0x678 32 RW 0x0 GPIO/LoanIO 41 Output/Output Enable Mux Selection Register
GPLMUX42 0x67C 32 RW 0x0 GPIO/LoanIO 42 Output/Output Enable Mux Selection Register
GPLMUX43 0x680 32 RW 0x0 GPIO/LoanIO 43 Output/Output Enable Mux Selection Register
GPLMUX44 0x684 32 RW 0x0 GPIO/LoanIO 44 Output/Output Enable Mux Selection Register
GPLMUX45 0x688 32 RW 0x0 GPIO/LoanIO 45 Output/Output Enable Mux Selection Register
GPLMUX46 0x68C 32 RW 0x0 GPIO/LoanIO 46 Output/Output Enable Mux Selection Register
GPLMUX47 0x690 32 RW 0x0 GPIO/LoanIO 47 Output/Output Enable Mux Selection Register
GPLMUX48 0x694 32 RW 0x0 GPIO/LoanIO 48 Output/Output Enable Mux Selection Register
GPLMUX49 0x698 32 RW 0x0 GPIO/LoanIO 49 Output/Output Enable Mux Selection Register
GPLMUX50 0x69C 32 RW 0x0 GPIO/LoanIO 50 Output/Output Enable Mux Selection Register
GPLMUX51 0x6A0 32 RW 0x0 GPIO/LoanIO 51 Output/Output Enable Mux Selection Register
GPLMUX52 0x6A4 32 RW 0x0 GPIO/LoanIO 52 Output/Output Enable Mux Selection Register
GPLMUX53 0x6A8 32 RW 0x0 GPIO/LoanIO 53 Output/Output Enable Mux Selection Register
GPLMUX54 0x6AC 32 RW 0x0 GPIO/LoanIO 54 Output/Output Enable Mux Selection Register
GPLMUX55 0x6B0 32 RW 0x0 GPIO/LoanIO 55 Output/Output Enable Mux Selection Register
GPLMUX56 0x6B4 32 RW 0x0 GPIO/LoanIO 56 Output/Output Enable Mux Selection Register
GPLMUX57 0x6B8 32 RW 0x0 GPIO/LoanIO 57 Output/Output Enable Mux Selection Register
GPLMUX58 0x6BC 32 RW 0x0 GPIO/LoanIO 58 Output/Output Enable Mux Selection Register
GPLMUX59 0x6C0 32 RW 0x0 GPIO/LoanIO 59 Output/Output Enable Mux Selection Register
GPLMUX60 0x6C4 32 RW 0x0 GPIO/LoanIO 60 Output/Output Enable Mux Selection Register
GPLMUX61 0x6C8 32 RW 0x0 GPIO/LoanIO 61 Output/Output Enable Mux Selection Register
GPLMUX62 0x6CC 32 RW 0x0 GPIO/LoanIO 62 Output/Output Enable Mux Selection Register
GPLMUX63 0x6D0 32 RW 0x0 GPIO/LoanIO 63 Output/Output Enable Mux Selection Register
GPLMUX64 0x6D4 32 RW 0x0 GPIO/LoanIO 64 Output/Output Enable Mux Selection Register
GPLMUX65 0x6D8 32 RW 0x0 GPIO/LoanIO 65 Output/Output Enable Mux Selection Register
GPLMUX66 0x6DC 32 RW 0x0 GPIO/LoanIO 66 Output/Output Enable Mux Selection Register
GPLMUX67 0x6E0 32 RW 0x0 GPIO/LoanIO 67 Output/Output Enable Mux Selection Register
GPLMUX68 0x6E4 32 RW 0x0 GPIO/LoanIO 68 Output/Output Enable Mux Selection Register
GPLMUX69 0x6E8 32 RW 0x0 GPIO/LoanIO 69 Output/Output Enable Mux Selection Register
GPLMUX70 0x6EC 32 RW 0x0 GPIO/LoanIO 70 Output/Output Enable Mux Selection Register
UART0USEFPGA 0x6F4 32 RW 0x0 Select source for UART0 signals (HPS Pins or FPGA Interface)
RGMII1USEFPGA 0x6F8 32 RW 0x0 Select source for RGMII1 signals (HPS Pins or FPGA Interface)
SPIS0USEFPGA 0x6FC 32 RW 0x0 Select source for SPIS0 signals (HPS Pins or FPGA Interface)
CAN0USEFPGA 0x700 32 RW 0x0 Select source for CAN0 signals (HPS Pins or FPGA Interface)
I2C0USEFPGA 0x704 32 RW 0x0 Select source for I2C0 signals (HPS Pins or FPGA Interface)
SDMMCUSEFPGA 0x708 32 RW 0x0 Select source for SDMMC signals (HPS Pins or FPGA Interface)
QSPIUSEFPGA 0x70C 32 RW 0x0 Select source for QSPI signals (HPS Pins or FPGA Interface)
SPIS1USEFPGA 0x710 32 RW 0x0 Select source for SPIS1 signals (HPS Pins or FPGA Interface)
RGMII0USEFPGA 0x714 32 RW 0x0 Select source for RGMII0 signals (HPS Pins or FPGA Interface)
UART1USEFPGA 0x718 32 RW 0x0 Select source for UART1 signals (HPS Pins or FPGA Interface)
CAN1USEFPGA 0x71C 32 RW 0x0 Select source for CAN1 signals (HPS Pins or FPGA Interface)
I2C3USEFPGA 0x724 32 RW 0x0 Select source for I2C3 signals (HPS Pins or FPGA Interface)
I2C2USEFPGA 0x728 32 RW 0x0 Select source for I2C2 signals (HPS Pins or FPGA Interface)
I2C1USEFPGA 0x72C 32 RW 0x0 Select source for I2C1 signals (HPS Pins or FPGA Interface)
SPIM1USEFPGA 0x730 32 RW 0x0 Select source for SPIM1 signals (HPS Pins or FPGA Interface)
SPIM0USEFPGA 0x738 32 RW 0x0 Select source for SPIM0 signals (HPS Pins or FPGA Interface)