bootstrap

Bootstrap fields sampled by NAND Flash Controller when released from reset. All fields are reset by a cold or warm reset.

Module Instance	Base Address	Register Address
`sysmgr`	`0xFFD08000`	`0xFFD08110`

Offset: 0x110

Access: RW

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by software or hardware. Any area of the memory map that is not explicitly defined as a register space or accessible memory is considered reserved.

Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`Reserved`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`Reserved`												`tworowaddr` `RW 0x0`	`noloadb0p0` `RW 0x0`	`page512` `RW 0x0`	`noinit` `RW 0x0`

bootstrap Fields

Bit	Name	Description	Access	Reset
3	`tworowaddr`	If 1, NAND device requires only 2 row address cycles instead of the normal 3 row address cycles.	`RW`	`0x0`
2	`noloadb0p0`	If 1, inhibits NAND Flash Controller from loading page 0 of block 0 of the NAND device as part of the initialization procedure.	`RW`	`0x0`
1	`page512`	If 1, NAND device has a 512 byte page size.	`RW`	`0x0`
0	`noinit`	If 1, inhibits NAND Flash Controller from performing initialization when coming out of reset. Instead, software must program all registers pertaining to device parameters like page size, width, etc.	`RW`	`0x0`