FPGA2SOC Address Map

Module Instance Base Address End Address
i_ccu__DSU__1c000000__FPGA2SOC 0x1C001000 0x1C001FFF
Register Offset Width Access Reset Value Description
XAIUIDR 0x0 32 RO 0x80001001 
XAIU Identification Register
XAIUFUIDR 0x4 32 RO 0x00000001 
XAIU Fabric Unit Identification Register
XAIUTCR 0x40 32 RO 0x000A0000 
Transaction Control Register
XAIUTAR 0x44 32 RO 0x00000000 
Transaction Activity Register
XAIUUEDR 0x100 32 RO 0x00000000 
Unit Uncorrectable Error Detect Register
XAIUUEIR 0x104 32 RO 0x00000000 
Unit Uncorrectable Error Interrupt Register
XAIUUESR 0x108 32 RO 0x00000000 
XAIU Uncorrectable Error Status Register
XAIUUELR0 0x10C 32 RW 0x00000000 
XAIU Uncorrectable Error Location Registers 0
XAIUUELR1 0x110 32 RO 0x00000000 
XAIU Uncorrectable Error Location Registers 1
XAIUUESAR 0x114 32 RW 0x00000000 
XAIU Uncorrectable Error Status Alias Register
XAIUCECR 0x140 32 RO 0x00000000 
XAIU Correctable Error Control Register
XAIUCESR 0x144 32 RO 0x00000000 
XAIU Correctable Error Status Register
XAIUCELR0 0x148 32 RW 0x00000000 
XAIU Correctable Error Location Registers 0
XAIUCELR1 0x14C 32 RO 0x00000000 
XAIU Correctable Error Location Registers 1
XAIUCESAR 0x150 32 RW 0x00000000 
XAIU Correctable Error Status Alias Register
XAIUCRTR 0x17C 32 RO 0x00000001 
XAIU Correctable Resiliency Threshold Register
XAIUTOCR 0x190 32 RW 0x00004000 
XAIU Timeout Control Register
XAIUQOSCR 0x200 32 RO 0x00000040 
XAIU QoS Control Register
XAIUQOSSR 0x204 32 RO 0x00000000 
XAIU QoS Status Register
XAIUNRSBAR 0x380 32 RO 0x000001C0 
NRS Base Address Register
XAIUNRSBHR 0x384 32 RW 0x00000000 
NRS Base Address Hold Register
XAIUNRSBLR 0x388 32 RO 0x00000040 
NRS Base Address Load Register
XAIUBRAR 0x3A0 32 RW 0xC0700600 
Boot Region Attribute Register
XAIUBRBLR 0x3A4 32 RW 0x00000000 
Boot Region Base Low Register
XAIUBRBHR 0x3A8 32 RO 0x00000000 
Boot Region Base High Register
XAIUAMIGR 0x3C0 32 RO 0x00000000 
Active Memory Interleave Group Register
XAIUMIFSR 0x3C4 32 RO 0x00000000 
Memory Interleave Function Select Register
XAIUGPRAR0 0x400 32 RW 0x00000000 
General Purpose Region Attribute Register
XAIUGPRBLR0 0x404 32 RW 0x00000000 
General Purpose Region Base Address Register
XAIUGPRBHR0 0x408 32 RO 0x00000000 
General Purpose Region Base Address Register
XAIUGPRAR1 0x410 32 RW 0x00000000 
General Purpose Region Attribute Register
XAIUGPRBLR1 0x414 32 RW 0x00000000 
General Purpose Region Base Address Register
XAIUGPRBHR1 0x418 32 RO 0x00000000 
General Purpose Region Base Address Register
XAIUGPRAR2 0x420 32 RW 0x00000000 
General Purpose Region Attribute Register
XAIUGPRBLR2 0x424 32 RW 0x00000000 
General Purpose Region Base Address Register
XAIUGPRBHR2 0x428 32 RO 0x00000000 
General Purpose Region Base Address Register
XAIUGPRAR3 0x430 32 RW 0x00000000 
General Purpose Region Attribute Register
XAIUGPRBLR3 0x434 32 RW 0x00000000 
General Purpose Region Base Address Register
XAIUGPRBHR3 0x438 32 RO 0x00000000 
General Purpose Region Base Address Register
XAIUGPRAR4 0x440 32 RW 0x00000000 
General Purpose Region Attribute Register
XAIUGPRBLR4 0x444 32 RW 0x00000000 
General Purpose Region Base Address Register
XAIUGPRBHR4 0x448 32 RO 0x00000000 
General Purpose Region Base Address Register
XAIUGPRAR5 0x450 32 RW 0x00000000 
General Purpose Region Attribute Register
XAIUGPRBLR5 0x454 32 RW 0x00000000 
General Purpose Region Base Address Register
XAIUGPRBHR5 0x458 32 RO 0x00000000 
General Purpose Region Base Address Register
XAIUGPRAR6 0x460 32 RW 0x00000000 
General Purpose Region Attribute Register
XAIUGPRBLR6 0x464 32 RW 0x00000000 
General Purpose Region Base Address Register
XAIUGPRBHR6 0x468 32 RO 0x00000000 
General Purpose Region Base Address Register
XAIUGPRAR7 0x470 32 RW 0x00000000 
General Purpose Region Attribute Register
XAIUGPRBLR7 0x474 32 RW 0x00000000 
General Purpose Region Base Address Register
XAIUGPRBHR7 0x478 32 RO 0x00000000 
General Purpose Region Base Address Register
XAIUGPRAR8 0x480 32 RW 0x00000000 
General Purpose Region Attribute Register
XAIUGPRBLR8 0x484 32 RW 0x00000000 
General Purpose Region Base Address Register
XAIUGPRBHR8 0x488 32 RO 0x00000000 
General Purpose Region Base Address Register
XAIUGPRAR9 0x490 32 RW 0x00000000 
General Purpose Region Attribute Register
XAIUGPRBLR9 0x494 32 RW 0x00000000 
General Purpose Region Base Address Register
XAIUGPRBHR9 0x498 32 RO 0x00000000 
General Purpose Region Base Address Register
XAIUGPRAR10 0x4A0 32 RW 0x00000000 
General Purpose Region Attribute Register
XAIUGPRBLR10 0x4A4 32 RW 0x00000000 
General Purpose Region Base Address Register
XAIUGPRBHR10 0x4A8 32 RO 0x00000000 
General Purpose Region Base Address Register
XAIUGPRAR11 0x4B0 32 RW 0x00000000 
General Purpose Region Attribute Register
XAIUGPRBLR11 0x4B4 32 RW 0x00000000 
General Purpose Region Base Address Register
XAIUGPRBHR11 0x4B8 32 RO 0x00000000 
General Purpose Region Base Address Register
XAIUTBALR0 0x808 32 RW 0x00000000 
XAIU Trace Trigger Base Address Low Register
XAIUTBAHR0 0x80C 32 RO 0x00000000 
XAIU Trace Trigger Base Address High Register
XAIUTOPCR00 0x810 32 RW 0x00000000 
XAIU Trace Trigger Opcode Register
XAIUTOPCR10 0x814 32 RW 0x00000000 
XAIU Trace Trigger Opcode Register
XAIUTUBR0 0x818 32 RW 0x00000000 
XAIU Trace Trigger User Bits Register
XAIUTUBMR0 0x81C 32 RW 0x00000000 
XAIU Trace Trigger User Bits Mask Register
XAIUCCTRLR 0x900 32 RW 0x10020000 
XAIU Capture Control Register
XAIUTCTRLR0 0x904 32 RW 0x00000001 
XAIU Trace Trigger Control Register
XAIUEDR0 0xA00 32 RW 0x00000000 
Credit on a per message type basis.
XAIUEDR1 0xA04 32 RW 0x00000008 
Hardware control debug register.
XAIUEDR2 0xA08 32 RO 0x00000000 
OTT pools.
XAIUEDR3 0xA0C 32 RO 0x00000000 
Limit OTT/STT sizes.
XAIUEDR4 0xA10 32 RO 0x00000000 
Limit Read/Write operations.
XAIUEDR5 0xA14 32 RO 0x00000000 
Limit evictions.
XAIUEDR6 0xA18 32 RO 0x00000000 
Credit adjustment per target type basis: 0x1: Max 1. 0x2: Max 2. 0x3: Max 3. 0x5: Minus 1. 0x6: Minus 2. 0x7: Minus 3. 0x9: 1 read others writes. 0xa: Reserve 1 write. 0xb: No limit. 0xd: reserve 1 extra write, 0xe: reserve 2 extra writes, 0xf: reserve 3 extra writes, Others: no change
XAIUEDR7 0xA1C 32 RW 0x00000000 
Specify period length for starvation detection
XAIUCNTCR0 0xB00 32 RO 0x00000000 
PMON Counter Control Register
XAIUCNTVR0 0xB04 32 RW 0x00000000 
PMON Counter Value Register
XAIUCNTSR0 0xB08 32 RW 0x00000000 
PMON Counter Saturation Register
XAIUCNTCR1 0xB10 32 RO 0x00000000 
PMON Counter Control Register
XAIUCNTVR1 0xB14 32 RW 0x00000000 
PMON Counter Value Register
XAIUCNTSR1 0xB18 32 RW 0x00000000 
PMON Counter Saturation Register
XAIUCNTCR2 0xB20 32 RO 0x00000000 
PMON Counter Control Register
XAIUCNTVR2 0xB24 32 RW 0x00000000 
PMON Counter Value Register
XAIUCNTSR2 0xB28 32 RW 0x00000000 
PMON Counter Saturation Register
XAIUCNTCR3 0xB30 32 RO 0x00000000 
PMON Counter Control Register
XAIUCNTVR3 0xB34 32 RW 0x00000000 
PMON Counter Value Register
XAIUCNTSR3 0xB38 32 RW 0x00000000 
PMON Counter Saturation Register
XAIUNRSAR 0xFF0 32 RO 0x00000001 
CAIU Ncore Register Space Attribute Register
XAIUENGIDR 0xFF4 32 RO 0xB92A000B 
XAIU Engineering ID Register
XAIUINFOR 0xFFC 32 RO 0x80021323 
XAIU Information Register