XAIUFUIDR

         XAIU Fabric Unit Identification Register
      
Module Instance Base Address Register Address
i_ccu__DSU__1c000000__FPGA2SOC 0x1C001000 0x1C001004

Size: 32

Offset: 0x4

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Rsvd1

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Rsvd1

RO 0x0

FUnitId

RO 0x1

XAIUFUIDR Fields

Bit Name Description Access Reset
31:4 Rsvd1
Reserved
RO 0x0
3:0 FUnitId
Fabric Unit Identifier of the unit
RO 0x1