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1.1.1. Altera® AXI4 Memory-Mapped Specification Support
1.1.2. Altera® AXI4 Memory-Mapped BFM Components
1.1.3. Altera® AXI4 Memory-Mapped Supported Features
1.1.4. Altera® AXI4 Memory-Mapped BFM SystemVerilog Packages
1.1.5. Altera® AXI4 Memory-Mapped BFM Supported Flows
1.1.6. Altera® AXI4 Memory-Mapped BFM Supported Simulators
1.3.1. Altera® AXI4 Memory-Mapped Manager BFM Configuration
1.3.2. Altera® AXI4 Memory-Mapped Manager BFM Interface
1.3.3. Altera® AXI4 Memory-Mapped Subordinate BFM Configuration
1.3.4. Altera® AXI4 Memory-Mapped Subordinate BFM Interface
1.3.5. Altera® AXI4-Lite Memory-Mapped Manager BFM Configuration
1.3.6. Altera® AXI4-Lite Memory-Mapped Manager BFM Interface
1.3.7. Altera® AXI4-Lite Memory-Mapped Subordinate BFM Configuration
1.3.8. Altera® AXI4-Lite Memory-Mapped Subordinate BFM Interface
1.3.9. Altera® AXI4 Memory-Mapped Inline Monitor Configuration
1.3.10. Altera® AXI4 Inline Monitor Interface
1.4.1. Using the Altera® AXI4 Memory-Mapped Manager BFM Flow
1.4.2. Using the Altera® AXI4 Memory-Mapped Subordinate BFM Flow
1.4.3. Using the Altera® AXI4 Memory-Mapped Monitor BFM Flow
1.4.4. Altera® AXI4 Memory-Mapped Manager RTL Implementation Example
1.4.5. Altera® AXI4 Memory-Mapped Manager Platform Designer BFM Implementation Example
1.5.1. Altera® AXI4 Memory-Mapped BFM Configuration API
1.5.2. Altera® AXI4 Memory-Mapped BFM Reset API
1.5.3. Altera® AXI4 Memory-Mapped Manager Transaction Creation API
1.5.4. Altera® AXI4 Memory-Mapped Subordinate Transaction Creation API
1.5.5. Altera® AXI4 Memory-Mapped Transaction Configuration API
1.5.6. Altera® AXI4 Memory-Mapped BFM Transaction Execution API
1.5.7. Altera® AXI4 Memory-Mapped Host Memory API
2.1.1. AXI4 Protocol Specification Support
2.1.2. Altera® AXI4 Streaming BFM Components
2.1.3. AXI4 Streaming Supported Features
2.1.4. Altera® AXI4 Streaming BFM SystemVerilog Packages
2.1.5. Altera® AXI4 Streaming BFM Supported Flows
AXI4 Streaming BFM RTL Flow
AXI4 Streaming BFM Platform Designer Flow
2.1.6. Altera® AXI4 Streaming BFM Supported Simulators
2.5.1.2.1. Class Axi4StreamBytes
2.5.1.2.2. Data Members in Axi4StreamBytes Class
2.5.1.2.3. Methods in Axi4StreamBytes Class
2.5.1.2.4. Class Axi4StreamBytesData
2.5.1.2.5. Methods in Axi4StreamBytesData Class
2.5.1.2.6. Class Axi4StreamBytesPosition
2.5.1.2.7. Methods in Axi4StreamBytesPosition Class
2.5.1.2.8. Class Axi4StreamBytesNull
2.5.1.2.9. Methods in Axi4StreamBytesNull Class
2.5.1.2.10. Class Axi4StreamBytesDataError
2.5.1.2.11. Data Members in Axi4StreamBytesDataError Class
2.5.1.2.12. Methods in Class Axi4StreamBytesDataError
2.5.1.2.13. Class Axi4StreamBytesPositionError
2.5.1.2.14. Data Members in Class Axi4StreamBytesPositionError
2.5.1.2.15. Methods in Class Axi4StreamBytesPositionError
2.5.1.2.16. Class Axi4StreamBytesNullError
2.5.1.2.17. Data Members in Class Axi4StreamBytesNullError
2.5.1.2.18. Methods in Class Axi4StreamBytesNullError
2.1.5. Altera® AXI4 Streaming BFM Supported Flows
AXI4 Streaming BFM RTL Flow
The Altera® AXI4 Streaming BFMs reside inside altera_lnsim.sv. You can instantiate the Altera AXI4 Streaming BFMs into your top level testbench or environment to drive AXI4 streaming transactions using the provided sets of APIs.
You can rapidly generate simulation models and setup scripts by following the general guidelines in Quartus® Prime Pro Edition User Guide: Third-party Simulation.
AXI4 Streaming BFM Platform Designer Flow
Alternatively, you can also include the Altera AXI4 Streaming BFMs in a Platform Designer system. Refer to Generating Simulation Files for Platform Designer Systems and IP Variants for general guidance on generating testbench and simulation files.