GTS SDI II IP User Guide

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ID 823539
Date 6/30/2025
Public
Document Table of Contents
Document Table of Contents x
1. GTS SDI II IP Quick Reference 2. GTS SDI II IP Core Overview 3. GTS SDI II IP Core Getting Started 4. GTS SDI II IP Parameters 5. GTS SDI II IP Core Functional Description 6. GTS SDI II IP Core Signals 7. GTS SDI II IP Core Design Considerations 8. GTS SDI II IP Core Testbench and Design Examples 9. Document Revision History for the GTS SDI II IP User Guide
2. GTS SDI II IP Core Overview x
2.1. Release Information 2.2. Device Family Support 2.3. General Description 2.4. Performance and Resource Utilization
3. GTS SDI II IP Core Getting Started x
3.1. Installing and Licensing IP Cores 3.2. Design Walkthrough 3.3. GTS SDI II IP Core Component Files 3.4. Compiling the GTS SDI II IP Core Design 3.5. Programming an FPGA
3.1. Installing and Licensing IP Cores x
3.1.1. Intel FPGA IP Evaluation Mode
3.2. Design Walkthrough x
3.2.1. Creating a New Quartus® Prime Project 3.2.2. Launching IP Catalog 3.2.3. Parameterizing the IP Core 3.2.4. Generating a Design Example and Simulation Testbench
5. GTS SDI II IP Core Functional Description x
5.1. Protocol 5.2. Transceiver 5.3. Submodules 5.4. Optional Features
5.1. Protocol x
5.1.1. Transmitter 5.1.2. Receiver
5.3. Submodules x
5.3.1. Insert Line 5.3.2. Insert/Check CRC 5.3.3. Insert Payload ID 5.3.4. Match TRS 5.3.5. Scrambler 5.3.6. TX Sample 5.3.7. Clock Enable Generator 5.3.8. RX Sample 5.3.9. Detect Video Standard 5.3.10. Detect 1 and 1/1.001 Rates 5.3.11. Transceiver Controller 5.3.12. Descrambler 5.3.13. TRS Aligner 5.3.14. 3Gb Demux 5.3.15. Extract Line 5.3.16. Extract Payload ID 5.3.17. Detect Format 5.3.18. Sync Streams 5.3.19. Convert SD Bits 5.3.20. Insert Sync Bits 5.3.21. Remove Sync Bits
5.4. Optional Features x
5.4.1. SMPTE RP168 Switching Support 5.4.2. SD 20-Bit Interface for Dual/Triple Rate 5.4.3. Intel FPGA Video Streaming Interface
5.4.3. Intel FPGA Video Streaming Interface x
5.4.3.1. RGB Pixel Packing 5.4.3.2. YCbCr 444 Pixel Packing 5.4.3.3. YCbCr 422 Pixel Packing 5.4.3.4. Supported Modes
6. GTS SDI II IP Core Signals x
6.1. GTS SDI II IP Core Resets and Clocks 6.2. Transmitter Protocol Signals 6.3. Receiver Protocol Signals 6.4. Transceiver Signals 6.5. Transmitter Streaming Video and Control Signals 6.6. Receiver Streaming Video and Control Signals
6.2. Transmitter Protocol Signals x
6.2.1. Image Mapping
6.3. Receiver Protocol Signals x
6.3.1. rx_format
7. GTS SDI II IP Core Design Considerations x
7.1. Transceiver Handling Guidelines 7.2. Dual Simplex Merging Tool (DS tool)
7.1. Transceiver Handling Guidelines x
7.1.1. Handling Transceiver in Agilex™ 5 Devices
7.1.1. Handling Transceiver in Agilex™ 5 Devices x
7.1.1.1. System PLL Clocking Mode 7.1.1.2. Unused Transceiver Tiles 7.1.1.3. SmartVID Settings
7.2. Dual Simplex Merging Tool (DS tool) x
7.2.1. Using the DS Tool
8. GTS SDI II IP Core Testbench and Design Examples x
8.1. Design Examples for Agilex™ 5 Devices
1. GTS SDI II IP Quick Reference
2. GTS SDI II IP Core Overview
3. GTS SDI II IP Core Getting Started
4. GTS SDI II IP Parameters
5. GTS SDI II IP Core Functional Description
6. GTS SDI II IP Core Signals
7. GTS SDI II IP Core Design Considerations
8. GTS SDI II IP Core Testbench and Design Examples
9. Document Revision History for the GTS SDI II IP User Guide

6.3. Receiver Protocol Signals

Table 16.  Receiver Protocol Signals—Synchronous to rx_coreclk
Signal Width Direction Description
rx_clkout_is_ntsc_paln

1

Output

Indicates that the receiver core is receiving video rate at NSTC (1/1.001) or PAL (1).
  • 0 = PAL rate (rx_clkout = 148.5 MHz or 74.25 MHz)
  • 1 = NTSC rate (when rx_clkout = 148.35 MHz or 74.175 MHz)
Note: Not applicable for SD-SDI and protocol only modes.
Table 17.  Receiver Protocol Signals—Synchronous to rx_clkout or xcvr_rxclk
Note: S = Indicates the number of 20-bit interfaces; 4 for multi-rate (up to 12G) mode and 1 for other modes.
Signal Width Direction Description
rx_datain

20S

Input

Receiver parallel data from the transceiver.

For Arria® 10, Cyclone® 10 GX, Stratix® 10, and Agilex™ 7 F-Tile devices, this signal is directly connected to the rx_parallel_data signal from the transceiver.
Note: If you are not enabling the simplified data interface, refer to the Transceiver parameter editor or the Transceiver PHY IP Core User Guide for proper data bit mapping.

For older supported devices, this signal is directly connected to the rx_dataout signal from the SDI receiver in transceiver mode.

Note: Available only in protocol mode.
rx_dataout

20S

Output

Receiver parallel data out.

In dual-rate or triple-rate mode:

  • Only lower 10 bits are valid for SD-SDI when SD Interface Bit Width = 10.
In multi-rate mode:
  • HD/3G-SDI: Only lower 20 bits are valid
  • 6G-SDI: Only lower 40 bits are valid

For bit ordering, refer to tx_datain signal description.

Note: Not applicable when Enable active video data protocols = AXIS-VVP Full.
rx_dataout_b

20

Output

Parallel data out signal for the receiver (link B).

Note: Applicable for HD-SDI dual link configuration only.
rx_dataout_valid

1

Output

Data valid from the oversampling logic. The receiver asserts this signal to indicate current data on rx_dataout is valid. The timing (H: High, L: Low) for each video standard has the following settings:

  • SD-SDI = 1H 4L 1H 5L
  • HD-SDI = H
  • 3G-SDI = H
  • HD-SDI Dual Link = H
  • Dual rate = SD (1H 4L 1H 5L); HD (H)
  • Triple rate = SD (1H 4L 1H 5L); HD (H); 3G (H)
  • Multi rate (up to 12G) = SD (1H 4L 1H 5L); HD (H); 3G/6G/12G (H)

The 1H4L 1H5L cadence for SD-SDI repeats indefinitely in an ideal case where the video source clock matches the CDR reference clock source. In a typical scenario, you may observe the cadence being shifted periodically (for instance, 1H4L 1H5L 1H5L 1H4L).

Note: Not applicable when Enable active video data protocols = AXIS-VVP Full.
rx_dataout_valid_b

1

Output

Data valid from the oversampling logic. The receiver asserts this signal to indicate current data on rx_dataout_b is valid. The timing (H: High, L: Low) for each video standard is identical to the rx_dataout_valid signal.
Note: Applicable for HD-SDI dual link configuration only.
rx_f

1S

Output

Field bit timing signal. This signal indicates which video field is currently active. For interlaced frame, 0 means first field (F0) while 1 means second field (F1). For progressive frame, the value is always 0.

rx_v

1S

Output

Vertical blanking interval timing signal. The receiver asserts this signal when the vertical blanking interval is active.

rx_h

1S

Output

Horizontal blanking interval timing signal. The receiver asserts this signal when the horizontal blanking interval is active.

rx_ap

1S

Output

Active picture interval timing signal. The receiver asserts this signal when the active picture interval is active.

Note: Not applicable when Enable active video data protocols = AXIS-VVP Full.
rx_std

3

Output

Receiver video standard with 10-bit multiplexed 10-bit parallel interface:

  • 3'b000: SD-SDI
  • 3'b001: HD-SDI
  • 3'b011: 3G-SDI Level A 10-bit Multiplex
  • 3'b010: 3G-SDI Level B 10-bit Multiplex
  • 3'b101: 6G-SDI 10-bit Multiplex Type 1
  • 3'b100: 6G-SDI 10-bit Multiplex Type 2
  • 3'b111: 12G-SDI 10-bit Multiplex Type 1
  • 3'b110: 12G-SDI 10-bit Multiplex Type 2
Note: For 6G and 12G-SDI, there are a few modes of data mapping for different image formats, and each of these modes requires different types of 10-bit Multiplex interface. For more details on the modes of data mapping and the type of 10-bit multiplexed interface, please refer to the SMPTE official documentation.

For instance, ST2081-10 Single link 6G-SDI has three modes of Data Mapping (Mode 1 – Mode 3).

Mode 2 and Mode 3 are assigned to 10-bit Multiplex Type 1.

While for Mode 1, it is assigned to 10-bit Multiplex Type 2.

This signal is only applicable for 3G-SDI, dual rate, triple rate, and multi rate.

rx_format

4S

Output

Indicates the format for the received video transport.

Refer to rx_format for more information about the video format values.
Note: For 3G-SDI and a higher data rate, ST425 Payload ID feature is mandatory. Altera recommends extracting the picture format information from the Payload ID’s byte data.
rx_eav

1S

Output

Receiver output that indicates current TRS is EAV. This signal is asserted at the fourth word of TRS, which is the XYZ word.

Note: Not applicable when Enable active video data protocols = AXIS-VVP Full.
rx_trs

1S

Output

Receiver output that indicates current word is TRS. This signal is asserted at the first word of 3FF 000 000 TRS.

Note: Not applicable when Enable active video data protocols = AXIS-VVP Full.
rx_ln

11S

Output

Receiver line number output.

Note: Applicable for all modes except SD-SDI.
Note: Not applicable when Enable active video data protocols = AXIS-VVP Full.
rx_ln_b

11S

Output

Receiver line number output for link B.
Note: Applicable for 3G-SDI, HD-SDI dual link, triple-rate, and multi-rate (up to 12G) modes only.
Note: Not applicable when Enable active video data protocols = AXIS-VVP Full.
rx_align_locked

1

Output

Alignment locked, indicating that a TRS has been spotted and word alignment is performed.

rx_align_locked_b

1

Output

Alignment locked for link B, indicating that a TRS has been spotted and word alignment is performed.

Note: Applicable for HD-SDI dual link configuration only.
rx_trs_locked

1S

Output

TRS locked, indicating that six consecutive TRSs with same timing has been spotted.

rx_trs_locked_b

1

Output

TRS locked for link B, indicating that six consecutive TRSs with same timing has been spotted.

Note: Applicable for HD-SDI dual link configuration only.
rx_frame_locked

1

Output

Frame locked, indicating that multiple frames with same timing has been spotted.

rx_frame_locked_b

1

Output

Frame locked for link B, indicating that multiple frames with same timing has been spotted.

Note: Applicable for HD-SDI dual link configuration only.
rx_dl_locked

1

Output

Dual link locked, indicating that both ports are aligned.

Note: Applicable for HD-SDI dual link configuration only.
rx_crc_error_c

1S

Output

CRC error on chroma channel. Applicable only when you enable CRC checking.

Note: Applicable for all modes except SD-SDI.
rx_crc_error_y

1S

Output

CRC error on luma channel.

Note: Applicable only when you enable CRC checking. Applicable for all modes except SD-SDI.
rx_crc_error_c_b

1S

Output

CRC error on chroma channel for link B.

Note: Applicable only when you enable CRC checking. Applicable for 3G-SDI, HD-SDI dual link, triple-rate, and multi-rate modes only.
rx_crc_error_y_b

1S

Output

CRC error on luma channel for link B. Applicable only when you enable CRC checking.

Note: Applicable for 3G-SDI, HD-SDI dual link, triple-rate, and multi-rate modes only.
rx_vpid_byte1

8S

Output

The core extracts payload ID byte 1.

Applicable only when you enable the Extract Payload ID (SMPTE ST 352) option.

Note: For Receiver Options – Extract Payload ID (SMPTE ST 352) and Enable active video data protocols = None only.
rx_vpid_byte2

8S

Output

The core extracts payload ID byte 2.

Applicable only when you enable the Extract Payload ID (SMPTE ST 352) option.

Note: For Receiver Options – Extract Payload ID (SMPTE ST 352) and Enable active video data protocols = None only.
rx_vpid_byte3

8S

Output

The core extracts payload ID byte 3.

Applicable only when you enable the Extract Payload ID (SMPTE ST 352) option.

Note: For Receiver Options – Extract Payload ID (SMPTE ST 352) and Enable active video data protocols = None only.
rx_vpid_byte4

8S

Output

The core extracts payload ID byte 4.

Applicable only when you enable the Extract Payload ID (SMPTE ST 352) option.

Note: For Receiver Options – Extract Payload ID (SMPTE ST 352) and Enable active video data protocols = None only.
rx_vpid_valid

1S

Output

Indicates that the extracted payload ID is valid.

Applicable only when you enable the Extract Payload ID (SMPTE ST 352) option.

Note: For Receiver Options – Extract Payload ID (SMPTE ST 352) and Enable active video data protocols = None only.
rx_vpid_checksum_error

1S

Output

Indicates that the extracted payload ID has a checksum error.

Applicable only when you enable the Extract Payload ID (SMPTE ST 352) option.

rx_vpid_byte1_b

8S

Output

The core extracts payload ID byte 1 for link B.

Applicable only when you enable the Extract Payload ID (SMPTE ST 352) option.

Note: Applicable for 3G-SDI, HD-SDI dual link, triple-rate, and multi-rate (up to 12G) modes only.
Note: For 3G-SDI, HD-SDI dual link, triple rate, multi rate (up to 12G) and Receiver Options – Extract Payload ID (SMPTE ST 352) and Enable active video data protocols = None only.
rx_vpid_byte2_b

8S

Output

The core extracts payload ID byte 2 for link B.

Applicable only when you enable the Extract Payload ID (SMPTE ST 352) option.

Note: Applicable for 3G-SDI, HD-SDI dual link, triple-rate, and multi-rate (up to 12G) modes only.
Note: For 3G-SDI, HD-SDI dual link, triple rate, multi rate (up to 12G) and Receiver Options – Extract Payload ID (SMPTE ST 352) and Enable active video data protocols = None only.
rx_vpid_byte3_b

8S

Output

The core extracts payload ID byte 3 for link B.

Applicable only when you enable the Extract Payload ID (SMPTE ST 352) option.

Note: Applicable for 3G-SDI, HD-SDI dual link, triple-rate, and multi-rate (up to 12G) modes only.
Note: For 3G-SDI, HD-SDI dual link, triple rate, multi rate (up to 12G) and Receiver Options – Extract Payload ID (SMPTE ST 352) and Enable active video data protocols = None only.
rx_vpid_byte4_b

8S

Output

The core extracts payload ID byte 4 for link B.

Applicable only when you enable the Extract Payload ID (SMPTE ST 352) option.

Note: Applicable for 3G-SDI, HD-SDI dual link, triple-rate, and multi-rate (up to 12G) modes only.
Note: For 3G-SDI, HD-SDI dual link, triple rate, multi rate (up to 12G) and Receiver Options – Extract Payload ID (SMPTE ST 352) and Enable active video data protocols = None only.
rx_vpid_valid_b

1S

Output

Indicates that the extracted payload ID for link B is valid.

Applicable only when you enable the Extract Payload ID (SMPTE ST 352) option.

Note: Applicable for 3G-SDI, HD-SDI dual link, triple-rate, and multi-rate (up to 12G) modes only.
Note: For 3G-SDI, HD-SDI dual link, triple rate, multi rate (up to 12G) and Receiver Options – Extract Payload ID (SMPTE ST 352) and Enable active video data protocols = None only.
rx_vpid_checksum_error_b

1S

Output

Indicates that the extracted payload ID for link B has a checksum error.

Applicable only when you enable the Extract Payload ID (SMPTE ST 352) option.

Note: Applicable for 3G-SDI, HD-SDI dual link, triple-rate, and multi-rate (up to 12G) modes only.
Note: For 3G-SDI, HD-SDI dual link, triple rate, multi rate (up to 12G) and Receiver Options – Extract Payload ID (SMPTE ST 352) and Enable active video data protocols = None only.
rx_line_f0

11S

Output

Line number of field 0 (F0) of the payload ID location. Requires two complete frames to update this signal.

Applicable only when you enable the Extract Video Payload ID (SMPTE ST 352 ) option.

Note: For Receiver Options – Extract Payload ID (SMPTE ST 352) and Enable active video data protocols = None only.
rx_line_f1

11S

Output

Line number of field 1 (F1) of the payload ID location. Requires two complete frames to update this signal.

Applicable only when you enable the Extract Video Payload ID (SMPTE ST 352) option.

Note: For Receiver Options – Extract Payload ID (SMPTE ST 352) and Enable active video data protocols = None only.

Section Content
rx_format

Level Two Title