2. Design Example Description
The design example demonstrates the basic functionality of the GTS CPRI PHY IP. You can generate the design from the Example Design tab in the GTS CPRI PHY IP parameter editor.
To generate the design example, you must first set the parameter values for the IP variation you intend to generate.
| CPRI Line Bit Rate (Gbps) | RS-FEC Support | Dynamic Reconfiguration | Reference Clock (MHz) | Deterministic Latency Support |
|---|---|---|---|---|
| 1.2288 | No | Yes | 153.6 or 122.88 | Yes |
| 2.4576 | No | Yes | 153.6 or 122.88 | Yes |
| 3.072 | No | Yes | 153.6 or 122.88 | Yes |
| 4.9152 | No | Yes | 153.6 or 122.88 | Yes |
| 6.144 | No | Yes | 153.6 or 122.88 | Yes |
| 9.8304 | No | Yes | 153.6 or 122.88 | Yes |
| 10.1376 | Without | No | 184.32 or 122.88 | Yes |
| 12.16512 | Without | No | 184.32 or 122.88 | Yes |
| 24.33024 | Without | No | 184.32 or 122.88 | Yes |
| 10.1376 | With | No | 184.32 or 122.88 | Yes |
| 12.16512 | With | No | 184.32 or 122.88 | Yes |
| 24.33024 | With | No | 184.32 or 122.88 | Yes |