Intel® MAX® 10 FPGA (10M08S, 144-EQFP) Evaluation Kit User Guide

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ID 812857
Date 1/08/2023
Public
Document Table of Contents
Document Table of Contents x
1. Overview 2. Getting Started 3. Board Components 4. Document Revision History for Intel® MAX® 10 FPGA (10M08S, 144-EQFP) Evaluation Kit User Guide A. Additional Information
1. Overview x
1.1. Board Component Blocks 1.2. Supported Items Not Included with the Kit
2. Getting Started x
2.1. Powering the Kit 2.2. Installing the Intel® FPGA Download Cable Driver 2.3. Handling the Kit 2.4. Factory Default Switch and Jumper Settings
3. Board Components x
3.1. Board Overview 3.2. Featured Device: Intel® MAX® 10 FPGA 3.3. Configuration 3.4. Clock Circuitry 3.5. Arduino Connectors 3.6. General User Input/Output 3.7. Power Supply
3.3. Configuration x
3.3.1. FPGA Programming over External Intel® FPGA Download Cable 3.3.2. Configuring the FPGA Using the Intel® Quartus® Prime Programmer 3.3.3. Selecting Internal Configuration Scheme 3.3.4. Generating a .pof File with ICB Settings 3.3.5. Programming Internal Flash Memory
3.4. Clock Circuitry x
3.4.1. General-Purpose Clock
3.6. General User Input/Output x
3.6.1. User-Defined DIP Switch 3.6.2. User-Defined LEDs
3.7. Power Supply x
3.7.1. Power Measurement 3.7.2. Power Distribution System 3.7.3. Temperature Sense
A. Additional Information x
A.1. Safety and Regulatory Information A.2. Compliance Information
A.1. Safety and Regulatory Information x
A.1.1. Safety Warnings A.1.2. Safety Cautions
1. Overview
2. Getting Started
3. Board Components
4. Document Revision History for Intel® MAX® 10 FPGA (10M08S, 144-EQFP) Evaluation Kit User Guide
A. Additional Information

3.1. Board Overview

This section provides an overview of the evaluation kit, including an annotated board image and component descriptions.

Figure 4. Overview of the Intel® MAX® 10 FPGA Evaluation Kit Features - Power Solution 2 (DK-DEV-10M08E144-B)
Figure 5. Overview of the Intel® MAX® 10 FPGA Evaluation Kit Features - Power Solution 1 (EK-10M08E144)
Table 5.   Intel® MAX® 10 FPGA (10M08S, 144-EQFP) Evaluation Kit Components
Board Reference Type Description
Featured Device
U2 FPGA

10M08SAE144C8G, (or ES variant) Plastic Enhanced Quad Flat Pack (EQFP),144 pins, 22 mm x 22 mm.

For package details, refer to the Packaging Device Information.

Configuration, Status, and Setup Elements
J6 Jumper for analog input channel #8 Default connection is to GND. Change jumper to pins 1 and 2 to switch analog source to Arduino header.
J7 Jumper for analog input channel #7 Default connection is to potentiometer (customer option to purchase and install). Change jumper to pins 1 and 2 to switch analog source to Arduino header.
SW3 User-defined DIP switch 6-position switch. SW3.1 through SW3.5 are user-defined. SW3.6 is predefined for dual-image configuration.
D1, D2, D3, D4, D5 LED, red These LEDs cycle off and on when the kit is powered on.
D6 Power LED, green Illuminates when USB power is present.
SW2 FPGA reconfiguration push- button Toggling this button causes the FPGA to reconfigure from on-die Configuration Flash Memory (CFM).
Clock Circuitry
X1 50 MHz oscillator 50 MHz crystal oscillator for general purpose logic.
General User Input and Output
D1, D2, D3, D4, D5 User-defined LEDs, red User-defined LEDs.
SW1 FPGA register push-button Toggling this button resets all registers in the FPGA.
R94 Potentiometer You must purchase and install this device to provide analog inputs signals to the Intel® MAX® 10 ADC IP block (analog input channel 8).
Connectors
J2,J3, J4, J5 Arduino UNO R3 connectors You can purchase Arduino UNO R3 compatible Shields (i.e. daughter cards) to connect to the Arduino headers installed on the board.
J10 JTAG header Connects an Altera Intel® FPGA Download Cable, Intel® FPGA Download Cable II, or Intel® FPGA Download Cable to program or configure the FPGA.
— Prototype Area This through-hole area is not connected to the FPGA. You can use this area to connect or solder additional components.
Power Supply
J1 USB connector Connects a USB cable to a power source.
Related Information
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