Intel® Simics® Simulator for Intel® FPGAs: Agilex™ 5 Virtual Platform User Guide
ID
786901
Date
5/09/2025
Public
1. About This Document
2. Agilex™ 5 Intel® Simics® Virtual Platforms
3. Agilex™ 5 Universal Virtual Platform Component Intel® Simics® Models
4. Running a Simulation with the Agilex™ 5 HPS Model
5. Supported Use Cases
6. Troubleshooting Issues When Migrating Software from Intel® Simics® to Hardware
A. Document Revision History for Intel Simics Simulator for Intel FPGAs Agilex 5 Virtual Platform User Guide
2.1.3.1. Boot-To-Operating System Prompt
2.1.3.2. Basic Ethernet
2.1.3.3. CPU Power-On and Boot Core Selection
2.1.3.4. Reset Flow
2.1.3.5. General Purpose I/O (GPIO) Loopback
2.1.3.6. USB Disks Hot-Plug Support
2.1.3.7. On-Chip Memory IP FPGA Fabric Example Design
2.1.3.8. FPGA-to-HPS Bridges
2.1.3.9. Exercising Peripheral Subsystem in FPGA Fabric Design
2.1.3.10. USB Controller Host/Device Mode Configuration
2.1.3.11. Agilex™ 5 HPS Component and Stepping Silicon Features Selection
2.1.3.12. UART1/UART2 Serial Console Selection
3.1. Agilex™ 5 HPS Intel® Simics® Model
This section describes the Intel® Simics® model of the Agilex™ 5 HPS and provides information related to the model architecture and device model availability.
For the HPS component, only relevant limitations compared with physical hardware are provided. Descriptions of features supported by the physical hardware are available in the Agilex™ 5 HPS Technical Reference Manual.
The Agilex™ 5 HPS Intel® Simics® model can run a commercial operating system such as Linux* or Zephyr* RTOS and supports the ability to select the boot core and core power states.
When compared to the HPS in the Agilex™ 7 SoC, the HPS in the Agilex™ 5 includes support for new features, such as TSN, USB 3.1 Gen1, and I3C.