FPGA AI Suite: IP Reference Manual

ID 768974
Date 3/29/2024
Document Table of Contents

4.3. Running the FPGA AI Suite Ahead-of-Time (AOT) Splitter Utility

Before you run the FPGA AI Suite AOT splitter utility, you must have the following files ready:
  • A model compiled by the dla_compiler command. The model must target the HETERO:FPGA format and the output format must be open_vino_hetero.
    For example, the following command compiles a model that targets a board with an Agilex™ 7 device to a file called RN50_Performance_b1.bin:
    cd $COREDLA_ROOT/demo/models/public/resnet-50-tf/FP32
    dla_compiler \
      --march $COREDLA_ROOT/example_architectures/AGX7_Performance.arch \
      --network-file ./resnet-50-tf.xml \
      --foutput-format=open_vino_hetero \
      --o $COREDLA_ROOT/demo/RN50_Performance_b1.bin \
      --b=1 \
  • The input or inputs for model inference.

The AOT splitter utility outputs the artifacts to the current working directory. The command line options must have a compiled model, model inputs, and a path to the splitter utility plugins XML file.

To run the AOT splitter utility:

  1. Change directories to where you want the output files from the AOT splitter utility to go.
  2. Run the splitter utility command as follows:
    $COREDLA_ROOT/runtime/build_Release/dla_aot_splitter/dla_aot_splitter \
      -cm <full_path_to_compiled_model_file> \
      -i < XXX-delimited list of inference input files> \
      -plugins_xml_file <full_path_to_plugins_aot_splitter.xml> \

    The optional -bgr command option tells the AOT splitter to reverse the R, G, and B input channels for images before the channels are passed to the model.

    For example:
    runtime/build_Release/dla_aot_splitter/dla_aot_splitter \
      -cm $COREDLA_ROOT/demo/RN50_Performance_b1.bin \
      -i $COREDLA_ROOT/demo/sample_images/val_00000000.bmp \
      -plugins_xml_file \
Running the splitter generates the following files: