F-Tile Low Latency 50G Ethernet Intel® FPGA Soft-IP User Guide

ID 758946
Date 5/10/2023

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents IP Core Preamble Processing

If you turn on Enable preamble passthrough in the parameter editor, the RX MAC forwards preamble bytes. The TX MAC requires the preamble bytes to be included in the frames at the Avalon® Streaming interface.

If you turn off Enable preamble passthrough, the IP core removes the preamble bytes. l1_rx_startofpacket is aligned to the MSB of the destination address.

Note: A single parameter in the F-Tile Low Latency 50G Ethernet Intel FPGA Soft-IP parameter editor turns on both RX and TX preamble passthrough.