4. Debug Setup for Nios® V Processor System
Modifying existing code is a common, easy way to learn to start writing software in a new environment. The Nios® V Processor Intel® FPGA IP provides example software designs that you can examine, modify, and use in your own programs. The examples are documented in the Nios® V Embedded Processor Design Handbook and are ready to compile.
This section guides you through the fundamental operations in RiscFree* IDE for Nios® V processors, providing steps for the following applications:
- Importing an application project for the Nios® V processor, with the board support package (BSP) project required to interface with your hardware.
- Building an application and BSP projects in RiscFree* IDE.
- Running the software on an Intel® FPGA development board.
The following OS support Nios® V applications:
- Intel® HAL (Bare-Metal)
- MicroC/OS-II (µC/OS-II)