F-Tile Ethernet Multirate Intel® FPGA IP User Guide

ID 714307
Date 5/01/2024
Public
Document Table of Contents

2.16.4. TX 1-Step Timestamp Interface

A separate TX 1-step timestamp interface is available for each supported port within a reconfiguration group. The below table shows the interface details for different number of ports.

For 400GE rate, width of TX 1-step timestamp is 2x of other Ethernet rates. The interface signals of port 2 and port 0 are concatenated for 400GE port 0 usage as below:
{msb, lsb} == {i_p2_ptp_<signals>, i_p0_ptp_<signals>}
The table describes the interface details for different number of ports.
Table 70.  Signals of the 1-Step TX Timestamp InterfaceFor signals description, refer to the F-Tile Ethernet Intel FPGA Hard IP User Guide.
Maximum Number of Ports Applicable Reconfiguration Groups Signal Name
1

FGT:

25GE-1 Reconfigurable

50GE-1 Reconfigurable

FHT:

50GE-1 Reconfigurable

100GE-1 Reconfigurable

Port 0:

i_p0_ptp_ins_ets

i_p0_ptp_ins_cf

i_p0_ptp_zero_csum

i_p0_ptp_update_eb

i_p0_ptp_p2p

i_po_ptp_asym

i_po_ptp_asym_sign

i_po_ptp_asym_p2p_idx[6:0]

i_po_ptp_ts_offset[15:0]

i_po_ptp_cf_offset[15:0]

i_po_ptp_csum_offset[15:0]

i_po_ptp_tx_its[95:0]

2

FGT:

100GE-2 Reconfigurable

FHT:

100GE-2 Reconfigurable

200GE-2 Reconfigurable

Port 0:

i_p0_ptp_ins_ets

i_p0_ptp_ins_cf

i_p0_ptp_zero_csum

i_p0_ptp_update_eb

i_p0_ptp_p2p

i_po_ptp_asym

i_po_ptp_asym_sign

i_po_ptp_asym_p2p_idx[6:0]

i_po_ptp_ts_offset[15:0]

i_po_ptp_cf_offset[15:0]

i_po_ptp_csum_offset[15:0]

i_po_ptp_tx_its[95:0]

Port 1:

i_p1_ptp_ins_ets

i_p1_ptp_ins_cf

i_p1_ptp_zero_csum

i_p1_ptp_update_eb

i_p1_ptp_p2p

i_p1_ptp_asym

i_p1_ptp_asym_sign

i_p1_ptp_asym_p2p_idx[6:0]

i_p1_ptp_ts_offset[15:0]

i_p1_ptp_cf_offset[15:0]

i_p1_ptp_csum_offset[15:0]

i_p1_ptp_tx_its[95:0]

4

FGT:

100GE-4 Reconfigurable

400GE-8 Reconfigurable

200GE-4 Reconfigurable

FHT:

100GE-4 Reconfigurable

400GE-4 Reconfigurable

200GE-4 Reconfigurable

Port 0:

i_p0_ptp_ins_ets

i_p0_ptp_ins_cf

i_p0_ptp_zero_csum

i_p0_ptp_update_eb

i_p0_ptp_p2p

i_po_ptp_asym

i_po_ptp_asym_sign

i_po_ptp_asym_p2p_idx[6:0]

i_po_ptp_ts_offset[15:0]

i_po_ptp_cf_offset[15:0]

i_po_ptp_csum_offset[15:0]

i_po_ptp_tx_its[95:0]

Port 1:

i_p1_ptp_ins_ets

i_p1_ptp_ins_cf

i_p1_ptp_zero_csum

i_p1_ptp_update_eb

i_p1_ptp_p2p

i_p1_ptp_asym

i_p1_ptp_asym_sign

i_p1_ptp_asym_p2p_idx[6:0]

i_p1_ptp_ts_offset[15:0]

i_p1_ptp_cf_offset[15:0]

i_p1_ptp_csum_offset[15:0]

i_p1_ptp_tx_its[95:0]

Port 2:

i_p2_ptp_ins_ets

i_p2_ptp_ins_cf

i_p2_ptp_zero_csum

i_p2_ptp_update_eb

i_p2_ptp_p2p

i_p2_ptp_asym

i_p2_ptp_asym_sign

i_p2_ptp_asym_p2p_idx[6:0]

i_p2_ptp_ts_offset[15:0]

i_p2_ptp_cf_offset[15:0]

i_p2_ptp_csum_offset[15:0]

i_p2_ptp_tx_its[95:0]

Port 3:

i_p3_ptp_ins_ets

i_p3_ptp_ins_cf

i_p3_ptp_zero_csum

i_p3_ptp_update_eb

i_p3_ptp_p2p

i_p3_ptp_asym

i_p3_ptp_asym_sign

i_p3_ptp_asym_p2p_idx[6:0]

i_p3_ptp_ts_offset[15:0]

i_p3_ptp_cf_offset[15:0]

i_p3_ptp_csum_offset[15:0]

i_p3_ptp_tx_its[95:0]