F-Tile Dynamic Reconfiguration Design Example User Guide

ID 710582
Date 9/26/2022
Public

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Document Table of Contents

1.2.2. Ethernet Multirate Design Example Parameters

Figure 4. Ethernet Multirate Example Design Tab
Table 3.  Ethernet Multirate Design Example Parameters
Parameters Value Description
Select Protocol/mode

Ethernet

Select the IP protocol for dynamic reconfiguration.
Select Base Variant

25G-1

25G-1 PTP

100G-4

100G-4 PTP

400G-8

400G-8 PTP

FHT 400G-4

Select the configuration of base variant for dynamic reconfiguration.
Example Design Files Simulation

Synthesis

Simulation option generates the testbench and compilation-only project. Synthesis option generates the hardware design example.
Note: Hardware design example support is not available for base variant with PTP.
Generated File Format Verilog

VHDL

Select the HDL files format. If you select VHDL, you must simulate the testbench with a mixed-language simulator.
Target Development Kit None

Agilex I-Series Transceiver-SoC Development Kit

Target development kit option specifies the target device used to generate the project.