F-Tile HDMI Intel® FPGA IP Design Example User Guide

ID 709314
Date 3/17/2023
Public

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Document Table of Contents

3.4.1. HDMI RX Direction

Parameter Value Description
DIRECTION Receiver Determines the selection for HDMI simplex RTL.
SUPPORT DEEP COLOR 1: On Determines if the core can decode deep color formats
SUPPORT AUXILIARY 1: On Determines if the auxiliary channel decoding is included
SUPPORT AUDIO 1: On Determines if the core can decode audio
PIXEL PER CLOCK 8 Supports 8 pixels per clock for Intel® Agilex™ devices
SUPPORT FRL 1: On For Intel® Agilex™ devices, only Support FRL =1 is supported
INCLUDE I2C MASTER/SLAVE 1: On Determines if the I2C slave block is included
INCLUDE EDID RAM 1: On Determines if the EDID RAM block is included
EDID RAM ADDR WIDTH 8 Log base 2 of the EDID RAM size
ENABLE ACTIVE VIDEO PROTOCOL AXIS-VVP Full Determines the input video data format