F-Tile JESD204C Intel® FPGA IP User Guide

ID 691272
Date 6/27/2023

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5.6.1. Multi-Device DAC Application for Subclass 1

SYSREF is the reference timing that start the LEMC counters in both converter devices and FPGA. You must determine the common E parameters for converter devices and logic devices, which is greater than the propagation time from TX to RX.
Figure 10. Multi-Device DAC Synchronization