Serial Lite III Streaming Intel® FPGA IP Core Release Notes

Download PDF
ID 683807
Date 4/08/2024
Public
Document Table of Contents
Document Table of Contents x
1. Serial Lite III Streaming Intel FPGA IP Core Release Notes
1. Serial Lite III Streaming Intel FPGA IP Core Release Notes x
1.1. Serial Lite III Streaming Intel FPGA IP Core v20.1.0 1.2. Serial Lite III Streaming Intel FPGA IP Core v20.0.2 1.3. Serial Lite III Streaming Intel FPGA IP Core v20.0.1 1.4. Serial Lite III Streaming Intel FPGA IP Core v20.0 1.5. Serial Lite III Streaming Intel FPGA IP Core v18.1 1.6. SerialLite III Streaming Intel FPGA IP Core v18.0 1.7. Intel FPGA SerialLite III Streaming IP Core v17.1 1.8. SerialLite III Streaming IP Core v17.0 1.9. SerialLite III Streaming IP Core v16.1 1.10. SerialLite III Streaming IP Core v16.0 1.11. SerialLite III Streaming IP Core v15.1 1.12. SerialLite III Streaming IP Core v15.0 1.13. SerialLite III Streaming IP Core v14.1
1. Serial Lite III Streaming Intel FPGA IP Core Release Notes

1.10. SerialLite III Streaming IP Core v16.0

Table 10.  v16.0 May 2016
Description Impact
Added a new parameter—Enable Transceiver Native PHY ADME. —
New Example Design tab in the IP parameter editor. Automatically generates both simulation and hardware design examples with the parameters you specify.
Renamed the parameter names in the IP parameter editor. —
Support automatic generation of basic SignalTap® II Logic Analyzer files. Simplifies generation of files for debugging.
Related Information
Level Two Title