Serial Lite III Streaming Intel® FPGA IP Core Release Notes

ID 683807
Date 4/08/2024

1.10. SerialLite III Streaming IP Core v16.0

Table 10.  v16.0 May 2016
Description Impact
Added a new parameter—Enable Transceiver Native PHY ADME.
New Example Design tab in the IP parameter editor. Automatically generates both simulation and hardware design examples with the parameters you specify.
Renamed the parameter names in the IP parameter editor.
Support automatic generation of basic SignalTap® II Logic Analyzer files. Simplifies generation of files for debugging.