AN 848: Implementing Intel® Cyclone® 10 GX Triple-Rate SDI II with Nextera FMC Daughter Card Reference Design

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ID 683643
Date 7/05/2018
Public
Document Table of Contents
Document Table of Contents x
AN 848: Implementing Intel® Cyclone® 10 GX Triple-Rate SDI II with Nextera FMC Daughter Card Reference Design
AN 848: Implementing Intel® Cyclone® 10 GX Triple-Rate SDI II with Nextera FMC Daughter Card Reference Design x
Reference Design Block Diagram Key Features Design Components Requirements Reference Design Walkthrough Document Revision History for AN 848: Implementing Intel® Cyclone® 10 GX Triple-Rate SDI II with Nextera FMC Daughter Card Reference Design
Requirements x
Hardware Requirements Software Requirements
Reference Design Walkthrough x
Running the Reference Design Customizing the Intel® Quartus® Prime Pro Edition Reference Design Viewing the Results
Running the Reference Design x
Compiling the Project Setting up the Hardware Configuring the FPGA Checking the Video Formats and Jitter Reading
Customizing the Intel® Quartus® Prime Pro Edition Reference Design x
Generating the Reference Design Customizing the Reference Design
Viewing the Results x
Monitor User LEDs Verify the Video Image and Jitter Results at the Signal Analyzer
AN 848: Implementing Intel® Cyclone® 10 GX Triple-Rate SDI II with Nextera FMC Daughter Card Reference Design

Running the Reference Design

To run the reference design, follow these steps:

  1. Compile the project.
  2. Setup the hardware.
  3. Configure the FPGA.
  4. Check the video formats and jitter reading.
Level Two Title