F-Tile Interlaken Intel® FPGA IP User Guide

ID 683622
Date 12/04/2023
Public
Document Table of Contents
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2.7. Compiling the Full Design and Programming the FPGA

You can use the Start Compilation command on the Processing menu in the Intel® Quartus® Prime software to compile your design. After successfully compiling your design, program the targeted Intel® device with the Programmer and verify the design in hardware.

Intel® Quartus® Prime may give a critical warning if the HSSI parameters in the Intel® Quartus® Prime settings file (.qsf) to configure the FHT and FGT PMAs are not specified.

You can refer to F-Tile Architecture and PMA and FEC Direct PHY IP User Guide (Section 3.12. Configurable Intel® Quartus® Prime Software Settings) to configure the FHT and FGT PMAs using the Intel® Quartus® Prime software settings file. (.qsf)