F-Tile Interlaken Intel® FPGA IP User Guide

ID 683622
Date 6/21/2022
Public

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4.2. Interlaken Look-aside Data Path Flow

The Interlaken Look-aside mode consists of two paths:
  • Interlaken Look-aside TX path
  • Interlaken Look-aside RX path
Each path includes MAC, PCS, and PMA blocks. The PCS blocks are implemented in hard IP.
Figure 10. Interlaken Look-aside Mode Block Diagram for NRZ VariationsThe figure illustrates the eight word data transfer scenario. This figure uses the following conventions:
  • m = Number of lanes
Figure 11. Interlaken Look-aside Mode Block Diagram for PAM4 VariationsThe figure illustrates the eight word data transfer scenario. This figure uses the following conventions:
  • m = Number of lanes

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