Intel® Stratix® 10 H-tile and L-tile Avalon® Memory-mapped Hard IP for PCI Express* Design Example User Guide
ID
683616
Date
3/07/2022
Public
1.1. Design Components
1.2. Hardware and Software Requirements
1.3. Directory Structure
1.4. Generating the Design Example
1.5. Simulating the Design Example
1.6. Compiling the Design Example and Programming the Device
1.7. Installing the Linux Kernel Driver
1.8. Running the Design Example Application
1.2. Hardware and Software Requirements
This design example has the following software and hardware requirements:
- Operating System: CentOS 7.0, 64-bit with 3.10.514 kernel compiled for x86_64 architecture
- Intel® Stratix® 10 MX or GX FPGA Development Kit supporting H-Tile PCIe Gen3
For details on the design example simulation steps and how to run Hardware tests, refer to Simulating the Design Example and Running the Design Example Application.
For more information on development kits, refer to FPGA Development Kits on the Intel web site.