Intel® Stratix® 10 H-tile and L-tile Avalon® Memory-mapped Hard IP for PCI Express* Design Example User Guide

ID 683616
Date 3/07/2022
Public
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1.6. Compiling the Design Example and Programming the Device

  1. Navigate to <project_dir>/pcie_s10_hip_avmm_bridge_0_example_design/ and open pcie_example_design.qpf.
  2. On the Processing menu, select Start Compilation.
  3. After successfully compiling your design, program the targeted device with the Programmer.

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