Intel® Stratix® 10 H-tile and L-tile Avalon® Memory-mapped Hard IP for PCI Express* Design Example User Guide
ID
683616
Date
3/07/2022
Public
1.1. Design Components
1.2. Hardware and Software Requirements
1.3. Directory Structure
1.4. Generating the Design Example
1.5. Simulating the Design Example
1.6. Compiling the Design Example and Programming the Device
1.7. Installing the Linux Kernel Driver
1.8. Running the Design Example Application
1.6. Compiling the Design Example and Programming the Device
- Navigate to <project_dir>/pcie_s10_hip_avmm_bridge_0_example_design/ and open pcie_example_design.qpf.
- On the Processing menu, select Start Compilation.
- After successfully compiling your design, program the targeted device with the Programmer.