PCIe Gen3x16 |
The FPGA communicates with the host CPU through PCIe Gen3x16 interface provided by the Intel® Stratix® 10. |
Partial Reconfiguration Support |
Provides the ability to dynamically swap out an AFU within the FIM. |
Remote Signal Tap |
Provides the ability to debug over the PCIe link. This feature combines virtual JTAG IP and the system console remote debugging capability. |
Remote Flash Update |
Supports in-band updates of board management controller image on the board management controller and updates to the FPGA image in QSPI flash. |
Multi-card Support |
Allows for more than one Intel® FPGA PAC D5005 card to be inserted into the system. |
Virtualization |
The Intel® Stratix® 10 provides virtualization capability by being SR-IOV enabled PCIe endpoint. |
Interrupts |
Supports physical function (PF) to virtual function (VF) communication through interrupts. |
Networking Support |
High-Speed Serial Interface (HSSI) PHY support for 8x10GbE. |
Telemetry support through OPAE |
Provides telemetry data using the OPAE fpgainfo command. |
Board sensor, thermal and power monitoring |
Provides board sensor, temperature and power data using the OPAE fpgainfo command and graceful thermal and power handling using the OPAE pacd service. |
Sample AFUs |
The following AFUs examples are provided with the Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs:
- dma_afu
- streaming_dma_afu
- eth_e2e_e10
- hello_afu
- hello_mem_afu
- hello_intr_afu
- nlb_mode_0
- nlb_mode_0_stp
- nlb_mode_3
|
DDR4 memory |
32GB DDR4 divided into 4 banks of 8GB with error checking and correction (ECC). |
Operating System |
Supports Red Hat* Enterprise Linux* (RHEL) 7.6 Kernel version 3.10.0-957. |
OPAE |
Provides integrated OPAE APIs.
- Support for fpgaflash command
- Support for fpgainfo command with telemetry
|
Intel® Accelerator Functional Unit (AFU) Simulation Environment (ASE) |
Co-simulation environment support for validating AFU compliance to protocols and APIs. |