Other IP Cores Release Notes

ID 683556
Date 5/07/2018
Public
Document Table of Contents

1.69. RAM: 1-port, RAM: 2-port, ROM: 1-port, and ROM: 2-port IP Cores v17.0

Table 71.  v17.0 May 2017
Description Impact
Added the Implement clock-enable circuitry for use in a partial reconfiguration region parameter for RAM: 1-port and RAM: 2-port IP cores. Turning on this parameter implements the clock-enable circuitry for use in a partial reconfiguration region. This change is optional. If you do not upgrade your IP core, it does not have this new feature.
Added support for Intel® Cyclone® 10 LP devices.