AN 829: PCI Express* Avalon® -MM DMA Reference Design

ID 683554
Date 6/11/2018
Public

1.2.4. DMA Procedure Steps

Software running on the host completes the following steps to initiate the DMA and verify the results:

  1. Software allocates system memory for the descriptor table.
  2. Software allocates system memory for the DMA data transfers.
  3. Software writes the descriptors to the descriptor table in the system memory. The DMA supports up to 128 read and 128 write descriptors. The descriptor table records the following information:
    • Descriptor ID, ranging from 0-127
    • Source address
    • Destination address
    • Size
  4. For the read DMA, the software initializes the system memory space with random data. The Read Data Mover moves this data from the system memory to either the on-chip or external memory. For the write DMA, the software initializes the on-chip or external memory with random data. The Write Data Mover moves the data from the on-chip or external memory to the system memory.
  5. Software programs the registers in the Descriptor Controller's control module through BAR0. Programming specifies the base address of the descriptor table in system memory and the base address of the FIFO that stores the descriptors in the FPGA.
  6. To initiate the DMA, software writes the ID of the last descriptor to the Descriptor Controller's control logic. The DMA begins fetching descriptors. The DMA starts with descriptor ID 0 and finishes with the ID of the last descriptor.
  7. After data transfers for the last descriptor complete, the Descriptor Controller writes 1'b1 to the Done bit in the descriptor table entry corresponding to the last descriptor in the PCIe* domain using the txs port.
  8. Software polls the Done bit in the descriptor table entry corresponding to the last descriptor. After the DMA Controller writes the Done bit, the DMA Controller calculates throughput. Software compares the data in the system memory to the on-chip or external memory. The test passes if there are no errors.
  9. For simultaneous read and writes, the software begins the read DMA operation before the write DMA operation. The DMA completes when all the read and write DMAs finish.