Visible to Intel only — GUID: sky1607105720155
Ixiasoft
1. Answers to Top FAQs
2. Overview of the Intel® FPGA Power and Thermal Calculator
3. Estimating Power Consumption with the Intel® FPGA Power and Thermal Calculator
4. Intel® FPGA Power and Thermal Calculator Graphical User Interface
5. Intel® FPGA Power and Thermal Calculator Pages
6. Factors Affecting the Accuracy of the Intel® FPGA PTC
7. Intel® FPGA Power and Thermal Calculator User Guide Archive
8. Document Revision History for the Intel® FPGA Power and Thermal Calculator User Guide
A. Measuring Static Power
4.2.2.1. Using Design Hierarchies in the Intel® FPGA Power and Thermal Calculator
4.2.2.2. Entering Hierarchy Information Into the Intel® FPGA PTC
4.2.2.3. Exporting, Importing, Duplicating, Renaming, and Deleting Hierarchies in the Intel® FPGA PTC
4.2.2.4. Bulk Editing Hierarchies in the Intel FPGA PTC
5.1. Intel® FPGA PTC - Power Summary/Navigation
5.2. Intel® FPGA PTC - Common Page Elements
5.3. Intel® FPGA PTC - Main Page
5.4. Intel® FPGA PTC - Logic Page
5.5. Intel® FPGA PTC - RAM Page
5.6. Intel® FPGA PTC - DSP Page
5.7. Intel® FPGA PTC - Clock Page
5.8. Intel® FPGA PTC - PLL Page
5.9. Intel® FPGA PTC - I/O Page
5.10. Intel® FPGA PTC - Transceiver Page
5.11. Intel® FPGA PTC - HPS Page
5.12. Intel® FPGA PTC - Crypto Page
5.13. Intel FPGA PTC - NOC Page
5.14. Intel® FPGA PTC - HBM Page
5.15. Intel® FPGA PTC - Thermal Page
5.16. Intel® FPGA PTC - Report Page
Visible to Intel only — GUID: sky1607105720155
Ixiasoft
5.10.1. Estimating E-Tile Channel PLL Power with the Intel Power and Thermal Calculator
You can estimate E-tile channel PLL power for Intel® Stratix® 10 devices, by adding a Transmitter-only row to the Transceiver page of the Intel® FPGA Power and Thermal Calculator (PTC).
The following three examples illustrate the Intel® FPGA PTC configuration for various E-tile channel PLL requirements.
Operation Mode | Data Rate | Digital/Analog Width | Power Mode | FEC | EHIP | Modulation | Digital Freq | # Refclks | Refclk Freq | VOD |
---|---|---|---|---|---|---|---|---|---|---|
Transmitter Only | 12800 | 16 | Normal Power | Bypass | Bypass | NRZ | 0 | 1 | 200 | 0 |
Operation Mode | Data Rate | Digital/Analog Width | Power Mode | FEC | EHIP | Modulation | Digital Freq | # Refclks | Refclk Freq | VOD |
---|---|---|---|---|---|---|---|---|---|---|
Transmitter Only | 8000 | 16 | Normal Power | Bypass | Bypass | NRZ | 0 | 1 | 125 | 0 |
Operation Mode | Data Rate | Digital/Analog Width | Power Mode | FEC | EHIP | Modulation | Digital Freq | # Refclks | Refclk Freq | VOD |
---|---|---|---|---|---|---|---|---|---|---|
Transmitter Only | 19660.8 | 40 | Normal Power | Bypass | Bypass | NRZ | 0 | 1 | 307 | 0 |
Alternatively, you can instantiate an E-Tile Transceiver-native PHY IP in PLL mode in your Intel® Quartus® Prime project, compile the project, and view the configuration in the Intel® FPGA PTC.
Related Information