Intel® FPGA Power and Thermal Calculator User Guide

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ID 683445
Date 6/26/2023
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Document Table of Contents
Document Table of Contents x
1. Answers to Top FAQs 2. Overview of the Intel® FPGA Power and Thermal Calculator 3. Estimating Power Consumption with the Intel® FPGA Power and Thermal Calculator 4. Intel® FPGA Power and Thermal Calculator Graphical User Interface 5. Intel® FPGA Power and Thermal Calculator Pages 6. Factors Affecting the Accuracy of the Intel® FPGA PTC 7. Intel® FPGA Power and Thermal Calculator User Guide Archive 8. Document Revision History for the Intel® FPGA Power and Thermal Calculator User Guide A. Measuring Static Power
2. Overview of the Intel® FPGA Power and Thermal Calculator x
2.1. Accessing the Intel FPGA Power and Thermal Calculators 2.2. Intel® FPGA PTC Power Model Status 2.3. Definitions of Power Terms Used in this Document
3. Estimating Power Consumption with the Intel® FPGA Power and Thermal Calculator x
3.1. Estimating Power Before Starting the FPGA Design 3.2. Estimating Power While Creating the FPGA Design 3.3. Estimating Power After Completing the FPGA Design 3.4. Using Design Hierarchies in the Intel® FPGA Power and Thermal Calculator 3.5. Estimating Power for Dual-Core Devices
3.2. Estimating Power While Creating the FPGA Design x
3.2.1. Importing a .qptc File Generated in the Intel® Quartus® Prime Power Analyzer
3.4. Using Design Hierarchies in the Intel® FPGA Power and Thermal Calculator x
3.4.1. Entering Hierarchy Information Into the Intel® FPGA PTC 3.4.2. Exporting, Importing, Duplicating, Renaming, and Deleting Hierarchies in the Intel® FPGA PTC 3.4.3. Bulk Editing Hierarchies in the Intel FPGA PTC
4. Intel® FPGA Power and Thermal Calculator Graphical User Interface x
4.1. Intel® FPGA PTC Select Family Dialog Box 4.2. Intel® FPGA PTC Primary GUI Components 4.3. Deleting Rows from Data Entry Pages 4.4. Intel® FPGA PTC - IP Wizard
4.2. Intel® FPGA PTC Primary GUI Components x
4.2.1. Intel® FPGA PTC Data Entry Pages 4.2.2. Intel® FPGA PTC Hierarchy Manager 4.2.3. Intel® FPGA PTC Field Types 4.2.4. Intel® FPGA PTC Data Entry Error Messages
4.2.3. Intel® FPGA PTC Field Types x
4.2.3.1. Intel® FPGA PTC Input Field Dependencies
5. Intel® FPGA Power and Thermal Calculator Pages x
5.1. Intel® FPGA PTC - Power Summary/Navigation 5.2. Intel® FPGA PTC - Common Page Elements 5.3. Intel® FPGA PTC - Main Page 5.4. Intel® FPGA PTC - Logic Page 5.5. Intel® FPGA PTC - RAM Page 5.6. Intel® FPGA PTC - DSP Page 5.7. Intel® FPGA PTC - Clock Page 5.8. Intel® FPGA PTC - PLL Page 5.9. Intel® FPGA PTC - I/O Page 5.10. Intel® FPGA PTC - Transceiver Page 5.11. Intel® FPGA PTC - HPS Page 5.12. Intel® FPGA PTC - Crypto Page 5.13. Intel FPGA PTC - NOC Page 5.14. Intel® FPGA PTC - HBM Page 5.15. Intel® FPGA PTC - Thermal Page 5.16. Intel® FPGA PTC - Report Page
5.3. Intel® FPGA PTC - Main Page x
5.3.1. Intel® FPGA PTC - Device Selection and Thermal Analysis Windows
5.10. Intel® FPGA PTC - Transceiver Page x
5.10.1. Estimating E-Tile Channel PLL Power with the Intel Power and Thermal Calculator
6. Factors Affecting the Accuracy of the Intel® FPGA PTC x
6.1. Toggle Rate 6.2. I/O Bank Allocation
1. Answers to Top FAQs
2. Overview of the Intel® FPGA Power and Thermal Calculator
3. Estimating Power Consumption with the Intel® FPGA Power and Thermal Calculator
4. Intel® FPGA Power and Thermal Calculator Graphical User Interface
5. Intel® FPGA Power and Thermal Calculator Pages
6. Factors Affecting the Accuracy of the Intel® FPGA PTC
7. Intel® FPGA Power and Thermal Calculator User Guide Archive
8. Document Revision History for the Intel® FPGA Power and Thermal Calculator User Guide
A. Measuring Static Power

5.2. Intel® FPGA PTC - Common Page Elements

The Intel® FPGA Power and Thermal Calculator (PTC) is divided into multiple data entry pages, each allowing power data entry for a subset of FPGA resources. The following elements are common to more than one page.

Recalculate mode

The Recalculate mode pulldown is available at the top-left corner of the Intel® FPGA PTC, regardless of which data entry page is open. The available settings are Automatic and Manual modes:

  • Automatic—in Automatic mode, the system automatically recalculates all field values whenever you modify an input value. Automatic is the default mode.
  • Manual—in Manual mode, output fields are left set to their last known value, as the system does not perform calculations or update the fields automatically. A warning message appears in the message list, and a 'Recalculation Needed' status bar appears beside the Recalculate mode pulldown. The status bar indicates that the results are outdated, and provides instructions on how to refresh the design's calculations. To recalculate, click the blue button to the right of the Recalculate mode pulldown, press the F9 keyboard key, or switch to Automatic mode.
Tip: In Automatic mode, the Intel® FPGA PTC may appear to become unresponsive while recalculating. If you are making multiple changes, you may find it a better experience to select Manual mode, and recalculate only once, after you have entered all your changes.

Total Thermal Power

The Total thermal power field estimates the total thermal power consumed by all FPGA resources on the specific data entry page. Some data entry pages may also provide a breakdown of the components contributing to the total thermal power. The total thermal power displayed in individual pages does not include static power, which is reported in the Power Summary for the whole device.

Thermal power is the power dissipated in the device. Total Thermal Power fields on individual data entry pages contain the sum of dynamic and standby thermal power of all the resources used in the device. Total thermal power includes only the thermal component for the I/O data entry page and does not include external power dissipation, such as from voltage-referenced termination resistors.

Resource Utilization

Most data entry pages contain one or more fields that provide an estimate of the percentage of resource utilization for the modules in the specific page. The Intel® FPGA PTC calculates these values based on the maximum available resources of a given type for a selected device. If resource utilization exceeds 100%, it indicates that the current device may not be able to support the resources entered into the data entry page.

Power Rail Current Consumption

Most data entry pages include a table showing the dynamic current consumption for all power rails used by the FPGA resources in the specific page. The same power rail may appear in multiple pages, and the dynamic currents reported in the Report page are the sums of all corresponding currents for a given rail at a given voltage in individual pages. The Report page also includes static currents, which are not reported in individual pages.

Note:
  • For Intel Agilex® 7 devices, the Power rail summary is dynamic, and for each individual data entry page shows only those rails in use by the design for resources listed on that page. The Power rail summary on the Report page shows only the rails for the selected device.
  • For Intel® Stratix® 10 devices, the Power rail summaries on the individual data entry pages and on the Report page, show all available rails whether actually in use or not.
  • For Intel Agilex® 7 devices, verify that you set the Power Characteristics field on the Main page to Maximum. The Intel® FPGA PTC does not report the current for a given power rail when you set Power Characteristics to Typical.

Why Typical Power Might Appear Larger than Maximum Power ( Intel® Stratix® 10 Devices Only)

Due to the methodologies employed by power modeling, instances can occur where the typical power for an Intel® Stratix® 10 device may appear to be higher than the maximum power. Every Intel® Stratix® 10 device is tested during the manufacturing process; this testing includes measuring the maximum static current drawn by each device rail, and total static power consumed across all rails. A given device does not draw maximum current on each rail simultaneously — consequently, the total static power actually consumed by the device in operation, is going to be lower than the sum of the individual maximum static powers measured for each rail.

The Intel® FPGA PTC Report page (and the Intel® Quartus® Prime Power Analyzer per-rail report) indicate the maximum per-rail static currents based on actual measurements, to help you choose appropriate voltage regulators. However, when calculating total thermal power and total static power, we make more realistic—and generally lower—assumptions for total static power across all rails.

Maximum power values are helpful for determining the proper regulator size for power delivery, and the proper thermal solution for cooling, to ensure operation to published specifications.

Typical power values are helpful for estimating average battery life or total cost of ownership. Typical values account for variations in process and are not based on real measurements of individual devices — they are not guaranteed values.

Instances can arise where the Typical power reported may be larger than the Maximum power. This aberration is a consequence of the modeling methods used, and is not indicative of an error.

Register Dynamic Power in Intel Agilex® 7 Devices

In Intel Agilex® 7 devices, register dynamic power includes the power consumed by all of a register's ports, including its clock ports. Because the clock ports consume power, a register with a non-zero clock frequency also has non-zero power consumption, even if you have set the Toggle % column value to zero.

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