|Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs 1.3.1|
This data sheet describes the Intel FPGA Programmable Acceleration Card N3000-N , featuring the Intel® Arria® 10 GT FPGA. This document provides electrical, mechanical, thermal, and other key specifications. The Intel FPGA Programmable Acceleration Card N3000-N is an enhanced version of the Intel® FPGA PAC N3000-2 with changes for systems requiring Telcordia* Network Equipment Building System (NEBS) compliance. This data sheet assists network operators and system integrators to properly deploy this Intel® FPGA PAC into their servers. This document describes the FPGA power envelope, connectivity speeds to memory, and network connectivity, so that accelerator function unit (AFU) developers can properly design and test their IP.
The Intel® FPGA PAC N3000-N is supported by the Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs. The Intel® Acceleration Stack provides a common developer interface to both application and acceleration function developers and includes drivers, Application Programming Interfaces (APIs) and an FPGA factory image.
For information about using the Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs, refer to the Intel® Acceleration Stack User Guide for Intel FPGA Programmable Acceleration Card N3000-N .
Intel validates each Intel® FPGA PAC N3000-N to support large scale deployments requiring FPGA acceleration. This platform is targeted for market-specific acceleration in applications such as:
- Network Function Virtualization (NFV)
- Multi-Access Edge Computing (MEC)
- Video Transcoding
- Cyber Security
- High-Performance Computing
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